[llvm-commits] [llvm] r81493 - /llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

[Dan Gohman]

Author: djg
Date: Thu Sep 10 19:36:43 2009
New Revision: 81493

URL: http://llvm.org/viewvc/llvm-project?rev=81493&view=rev
Log:
Make fast-isel try ISD::FNEG before resorting to bitcasts and xors.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=81493&r1=81492&r2=81493&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Thu Sep 10 19:36:43 2009
@@ -615,9 +615,17 @@
   unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I));
   if (OpReg == 0) return false;
 
+  // If the target has ISD::FNEG, use it.
+  EVT VT = TLI.getValueType(I->getType());
+  unsigned ResultReg = FastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(),
+                                  ISD::FNEG, OpReg);
+  if (ResultReg != 0) {
+    UpdateValueMap(I, ResultReg);
+    return true;
+  }
+
   // Bitcast the value to integer, twiddle the sign bit with xor,
   // and then bitcast it back to floating-point.
-  EVT VT = TLI.getValueType(I->getType());
   if (VT.getSizeInBits() > 64) return false;
   EVT IntVT = EVT::getIntegerVT(I->getContext(), VT.getSizeInBits());
   if (!TLI.isTypeLegal(IntVT))