[llvm-commits] [llvm] r81464 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/ARM/2009-09-10-postdec.ll

[Bob Wilson]

Author: bwilson
Date: Thu Sep 10 17:09:31 2009
New Revision: 81464

URL: http://llvm.org/viewvc/llvm-project?rev=81464&view=rev
Log:
Don't swap the operands of a subtraction when trying to create a
post-decrement load/store.

Added:
    llvm/trunk/test/CodeGen/ARM/2009-09-10-postdec.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=81464&r1=81463&r2=81464&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Sep 10 17:09:31 2009
@@ -4715,7 +4715,7 @@
     SDValue Offset;
     ISD::MemIndexedMode AM = ISD::UNINDEXED;
     if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM, DAG)) {
-      if (Ptr == Offset)
+      if (Ptr == Offset && Op->getOpcode() == ISD::ADD)
         std::swap(BasePtr, Offset);
       if (Ptr != BasePtr)
         continue;

Added: llvm/trunk/test/CodeGen/ARM/2009-09-10-postdec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-09-10-postdec.ll?rev=81464&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2009-09-10-postdec.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2009-09-10-postdec.ll Thu Sep 10 17:09:31 2009
@@ -0,0 +1,11 @@
+; RUN: llc -march=arm < %s | FileCheck %s
+; Radar 7213850
+
+define i32 @test(i8* %d, i32 %x, i32 %y) nounwind {
+  %1 = ptrtoint i8* %d to i32
+;CHECK: sub
+  %2 = sub i32 %x, %1
+  %3 = add nsw i32 %2, %y
+  store i8 0, i8* %d, align 1
+  ret i32 %3
+}