[llvm-commits] [llvm] r80963 - in /llvm/trunk: include/llvm/CodeGen/FastISel.h lib/CodeGen/SelectionDAG/FastISel.cpp test/CodeGen/X86/fast-isel-fneg.ll
Chris Lattner
clattner at apple.com
Mon Sep 7 15:23:27 PDT 2009
On Sep 3, 2009, at 3:53 PM, Dan Gohman wrote:
> Author: djg
> Date: Thu Sep 3 17:53:57 2009
> New Revision: 80963
>
> URL: http://llvm.org/viewvc/llvm-project?rev=80963&view=rev
> Log:
> LLVM currently represents floating-point negation as -0.0 - x. Fix
> FastISel to recognize this pattern and emit a floating-point
> negation using xor.
ISD::XOR is legal for floating point operands?
-Chris
>
> Added:
> llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll
> Modified:
> llvm/trunk/include/llvm/CodeGen/FastISel.h
> llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=80963&r1=80962&r2=80963&view=diff
>
> =
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> ======================================================================
> --- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/FastISel.h Thu Sep 3 17:53:57
> 2009
> @@ -300,6 +300,8 @@
> private:
> bool SelectBinaryOp(User *I, ISD::NodeType ISDOpcode);
>
> + bool SelectFNeg(User *I);
> +
> bool SelectGetElementPtr(User *I);
>
> bool SelectCall(User *I);
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=80963&r1=80962&r2=80963&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Thu Sep 3
> 17:53:57 2009
> @@ -608,6 +608,26 @@
> MBB->addSuccessor(MSucc);
> }
>
> +/// SelectFNeg - Emit an FNeg operation.
> +///
> +bool
> +FastISel::SelectFNeg(User *I) {
> + unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument
> (I));
> + if (OpReg == 0) return false;
> +
> + // Twiddle the sign bit with xor.
> + EVT VT = TLI.getValueType(I->getType());
> + if (VT.getSizeInBits() > 64) return false;
> + unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISD::XOR,
> OpReg,
> + UINT64_C(1) << (VT.getSizeInBits
> ()-1),
> + VT.getSimpleVT());
> + if (ResultReg == 0)
> + return false;
> +
> + UpdateValueMap(I, ResultReg);
> + return true;
> +}
> +
> bool
> FastISel::SelectOperator(User *I, unsigned Opcode) {
> switch (Opcode) {
> @@ -618,6 +638,9 @@
> case Instruction::Sub:
> return SelectBinaryOp(I, ISD::SUB);
> case Instruction::FSub:
> + // FNeg is currently represented in LLVM IR as a special case
> of FSub.
> + if (BinaryOperator::isFNeg(I))
> + return SelectFNeg(I);
> return SelectBinaryOp(I, ISD::FSUB);
> case Instruction::Mul:
> return SelectBinaryOp(I, ISD::MUL);
>
> Added: llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll?rev=80963&view=auto
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll Thu Sep 3
> 17:53:57 2009
> @@ -0,0 +1,15 @@
> +; RUN: llvm-as < %s | llc -fast-isel -march=x86-64 | FileCheck %s
> +
> +; CHECK: doo:
> +; CHECK: xorpd
> +define double @doo(double %x) nounwind {
> + %y = fsub double -0.0, %x
> + ret double %y
> +}
> +
> +; CHECK: foo:
> +; CHECK: xorps
> +define float @foo(float %x) nounwind {
> + %y = fsub float -0.0, %x
> + ret float %y
> +}
>
>
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