[llvm-commits] [llvm] r81060 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h test/CodeGen/X86/pr3495.ll test/CodeGen/X86/stack-color-with-reg.ll
Evan Cheng
evan.cheng at apple.com
Fri Sep 4 18:24:38 PDT 2009
Ah, very nice. Thanks Bob.
Evan
On Sep 4, 2009, at 6:19 PM, Bob Wilson wrote:
> Author: bwilson
> Date: Fri Sep 4 20:19:16 2009
> New Revision: 81060
>
> URL: http://llvm.org/viewvc/llvm-project?rev=81060&view=rev
> Log:
> Stabilize the order of live intervals in the priority_queue used by
> the
> linear scan reg alloc. This fixes a problem I ran into where
> extracting
> a function from a larger file caused the generated code to change
> (masking
> the problem I was trying to debug) because the allocator behaved
> differently.
>
> This changes the results for two X86 regression checks. stack-color-
> with-reg
> is improved, with one less instruction, but pr3495 is worse, with
> one more
> copy. As far as I can tell, these tests were just getting lucky or
> unlucky,
> so I've changed the expected results.
>
> Modified:
> llvm/trunk/include/llvm/CodeGen/LiveInterval.h
> llvm/trunk/test/CodeGen/X86/pr3495.ll
> llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll
>
> Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=81060&r1=81059&r2=81060&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Fri Sep 4
> 20:19:16 2009
> @@ -774,7 +774,10 @@
> void ComputeJoinedWeight(const LiveInterval &Other);
>
> bool operator<(const LiveInterval& other) const {
> - return beginIndex() < other.beginIndex();
> + const MachineInstrIndex &thisIndex = beginIndex();
> + const MachineInstrIndex &otherIndex = other.beginIndex();
> + return (thisIndex < otherIndex ||
> + (thisIndex == otherIndex && reg < other.reg));
> }
>
> void print(raw_ostream &OS, const TargetRegisterInfo *TRI = 0)
> const;
>
> Modified: llvm/trunk/test/CodeGen/X86/pr3495.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3495.ll?rev=81060&r1=81059&r2=81060&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/test/CodeGen/X86/pr3495.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/pr3495.ll Fri Sep 4 20:19:16 2009
> @@ -1,6 +1,6 @@
> -; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of
> reloads omited} | grep 2
> -; RUN: llvm-as < %s | llc -march=x86 -stats |& not grep {Number of
> available reloads turned into copies}
> -; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of
> machine instrs printed} | grep 39
> +; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of
> reloads omited} | grep 1
> +; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of
> available reloads turned into copies} | grep 1
> +; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of
> machine instrs printed} | grep 40
> ; PR3495
> ; The loop reversal kicks in once here, resulting in one fewer
> instruction.
>
>
> Modified: llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll?rev=81060&r1=81059&r2=81060&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll Fri Sep 4
> 20:19:16 2009
> @@ -1,7 +1,7 @@
> ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -relocation-
> model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-
> file - > %t
> ; RUN: grep stackcoloring %t | grep "loads eliminated"
> ; RUN: grep stackcoloring %t | grep "stack slot refs replaced with
> reg refs" | grep 5
> -; RUN: grep asm-printer %t | grep 182
> +; RUN: grep asm-printer %t | grep 181
>
> type { [62 x %struct.Bitvec*] } ; type %0
> type { i8* } ; type %1
>
>
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