[llvm-commits] [llvm] r80696 - in /llvm/trunk/lib/Target/X86: X86Instr64bit.td X86InstrInfo.td

[Daniel Dunbar]

Do we need a new convention for naming these kinds of instructions?
TEST32i32 is a little confusing to me...

 - Daniel

On Tue, Sep 1, 2009 at 11:14 AM, Sean Callanan<scallanan at apple.com> wrote:
> Author: spyffe
> Date: Tue Sep  1 13:14:18 2009
> New Revision: 80696
>
> URL: http://llvm.org/viewvc/llvm-project?rev=80696&view=rev
> Log:
> Added TEST %rAX, $imm instructions to the Intel tables.  These are required for the X86 disassembler.
>
> Modified:
>    llvm/trunk/lib/Target/X86/X86Instr64bit.td
>    llvm/trunk/lib/Target/X86/X86InstrInfo.td
>
> Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=80696&r1=80695&r2=80696&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
> +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Tue Sep  1 13:14:18 2009
> @@ -984,6 +984,8 @@
>
>  // Integer comparison
>  let Defs = [EFLAGS] in {
> +def TEST64i32 : RI<0xa9, RawFrm, (outs), (ins i32imm:$src),
> +                   "test{q}\t{$src, %rax|%rax, $src}", []>;
>  let isCommutable = 1 in
>  def TEST64rr : RI<0x85, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2),
>                   "test{q}\t{$src2, $src1|$src1, $src2}",
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=80696&r1=80695&r2=80696&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Sep  1 13:14:18 2009
> @@ -2753,6 +2753,13 @@
>                       (implicit EFLAGS)]>;
>  }
>
> +def TEST8i8  : Ii8<0xA8, RawFrm, (outs), (ins i8imm:$src),
> +                   "test{b}\t{$src, %al|%al, $src}", []>;
> +def TEST16i16 : Ii16<0xA9, RawFrm, (outs), (ins i16imm:$src),
> +                     "test{w}\t{$src, %ax|%ax, $src}", []>, OpSize;
> +def TEST32i32 : Ii32<0xA9, RawFrm, (outs), (ins i32imm:$src),
> +                     "test{l}\t{$src, %eax|%eax, $src}", []>;
> +
>  def TEST8rm  : I<0x84, MRMSrcMem, (outs),  (ins GR8 :$src1, i8mem :$src2),
>                      "test{b}\t{$src2, $src1|$src1, $src2}",
>                      [(X86cmp (and GR8:$src1, (loadi8 addr:$src2)), 0),
>
>
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