[llvm-commits] [llvm] r80354 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

[Daniel Dunbar]

Author: ddunbar
Date: Fri Aug 28 03:08:22 2009
New Revision: 80354

URL: http://llvm.org/viewvc/llvm-project?rev=80354&view=rev
Log:
Fix -Asserts warning, round two.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=80354&r1=80353&r2=80354&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Fri Aug 28 03:08:22 2009
@@ -1057,12 +1057,11 @@
   if (Done)
     return;
 
-  const TargetInstrDesc &Desc = MI.getDesc();
-
   // If we get here, the immediate doesn't fit into the instruction.  We folded
   // as much as possible above, handle the rest, providing a register that is
   // SP+LargeImm.
-  assert((Offset || (Desc.TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4) &&
+  assert((Offset ||
+          (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4) &&
          "This code isn't needed if offset already handled!");
 
   // Insert a set of r12 with the full address: r12 = sp + offset