[llvm-commits] [llvm] r80338 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Daniel Dunbar daniel at zuster.org
Thu Aug 27 22:47:56 PDT 2009


Author: ddunbar
Date: Fri Aug 28 00:47:56 2009
New Revision: 80338

URL: http://llvm.org/viewvc/llvm-project?rev=80338&view=rev
Log:
Fix -Asserts warning.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=80338&r1=80337&r2=80338&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Fri Aug 28 00:47:56 2009
@@ -1058,12 +1058,11 @@
     return;
 
   const TargetInstrDesc &Desc = MI.getDesc();
-  unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
 
   // If we get here, the immediate doesn't fit into the instruction.  We folded
   // as much as possible above, handle the rest, providing a register that is
   // SP+LargeImm.
-  assert((Offset || AddrMode == ARMII::AddrMode4) &&
+  assert((Offset || (Desc.TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4) &&
          "This code isn't needed if offset already handled!");
 
   // Insert a set of r12 with the full address: r12 = sp + offset





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