[llvm-commits] [llvm] r79792 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Eli Friedman]

Author: efriedma
Date: Sat Aug 22 19:14:19 2009
New Revision: 79792

URL: http://llvm.org/viewvc/llvm-project?rev=79792&view=rev
Log:
Add check for completeness.  Note that this doesn't actually have any 
effect with the way the current code is structured.


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=79792&r1=79791&r2=79792&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Aug 22 19:14:19 2009
@@ -3460,7 +3460,7 @@
 
   unsigned EVTBits = ExtVT.getSizeInBits();
   unsigned ShAmt = 0;
-  if (N0.getOpcode() == ISD::SRL && N0.hasOneUse()) {
+  if (N0.getOpcode() == ISD::SRL && N0.hasOneUse() && ExtVT.isRound()) {
     if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
       ShAmt = N01->getZExtValue();
       // Is the shift amount a multiple of size of VT?