[llvm-commits] [llvm] r79079 - in /llvm/trunk: lib/Target/XCore/XCoreTargetObjectFile.cpp test/CodeGen/XCore/globals.ll test/CodeGen/XCore/tls.ll
Chris Lattner
sabre at nondot.org
Fri Aug 14 23:09:35 PDT 2009
Author: lattner
Date: Sat Aug 15 01:09:35 2009
New Revision: 79079
URL: http://llvm.org/viewvc/llvm-project?rev=79079&view=rev
Log:
use XCore-specific section with xcore specific cp/dp flags to restore
support for globals going into the appropriate sections with the flags.
This hopefully finishes unbreaking the previous behavior that I broke before.
Modified:
llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.cpp
llvm/trunk/test/CodeGen/XCore/globals.ll
llvm/trunk/test/CodeGen/XCore/tls.ll
Modified: llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.cpp?rev=79079&r1=79078&r2=79079&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.cpp Sat Aug 15 01:09:35 2009
@@ -9,7 +9,7 @@
#include "XCoreTargetObjectFile.h"
#include "XCoreSubtarget.h"
-#include "llvm/MC/MCSectionELF.h"
+#include "MCSectionXCore.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
@@ -17,12 +17,22 @@
void XCoreTargetObjectFile::Initialize(MCContext &Ctx, const TargetMachine &TM){
TargetLoweringObjectFileELF::Initialize(Ctx, TM);
- DataSection = getELFSection(".dp.data", MCSectionELF::SHT_PROGBITS,
- MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE,
- SectionKind::getDataRel());
- BSSSection = getELFSection(".dp.bss", MCSectionELF::SHT_NOBITS,
- MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE,
- SectionKind::getBSS());
+ DataSection =
+ MCSectionXCore::Create(".dp.data", MCSectionELF::SHT_PROGBITS,
+ MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE |
+ MCSectionXCore::SHF_DP_SECTION,
+ SectionKind::getDataRel(), false, getContext());
+ BSSSection =
+ MCSectionXCore::Create(".dp.bss", MCSectionELF::SHT_NOBITS,
+ MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE |
+ MCSectionXCore::SHF_DP_SECTION,
+ SectionKind::getBSS(), false, getContext());
+
+ // For now, disable lowering of mergable sections, just drop everything into
+ // ReadOnly.
+ MergeableConst4Section = 0;
+ MergeableConst8Section = 0;
+ MergeableConst16Section = 0;
// TLS globals are lowered in the backend to arrays indexed by the current
// thread id. After lowering they require no special handling by the linker
@@ -31,13 +41,15 @@
TLSBSSSection = BSSSection;
if (TM.getSubtarget<XCoreSubtarget>().isXS1A())
- // FIXME: Why is this writable ("datarel")???
- ReadOnlySection =
- getELFSection(".dp.rodata", MCSectionELF::SHT_PROGBITS,
- MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE,
- SectionKind::getDataRel());
+ ReadOnlySection = // FIXME: Why is this a writable section for XS1A?
+ MCSectionXCore::Create(".dp.rodata", MCSectionELF::SHT_PROGBITS,
+ MCSectionELF::SHF_ALLOC | MCSectionELF::SHF_WRITE |
+ MCSectionXCore::SHF_DP_SECTION,
+ SectionKind::getDataRel(), false, getContext());
else
ReadOnlySection =
- getELFSection(".cp.rodata", MCSectionELF::SHT_PROGBITS,
- MCSectionELF::SHF_ALLOC, SectionKind::getReadOnly());
+ MCSectionXCore::Create(".cp.rodata", MCSectionELF::SHT_PROGBITS,
+ MCSectionELF::SHF_ALLOC |
+ MCSectionXCore::SHF_CP_SECTION,
+ SectionKind::getReadOnly(), false, getContext());
}
Modified: llvm/trunk/test/CodeGen/XCore/globals.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/globals.ll?rev=79079&r1=79078&r2=79079&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/globals.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/globals.ll Sat Aug 15 01:09:35 2009
@@ -1,5 +1,4 @@
; RUN: llvm-as < %s | llc -march=xcore -mcpu=xs1b-generic | FileCheck %s
-; XFAIL: *
define i32 *@addr_G1() {
entry:
Modified: llvm/trunk/test/CodeGen/XCore/tls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/tls.ll?rev=79079&r1=79078&r2=79079&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/tls.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/tls.ll Sat Aug 15 01:09:35 2009
@@ -1,5 +1,4 @@
; RUN: llvm-as < %s | llc -march=xcore -mcpu=xs1b-generic | FileCheck %s
-; XFAIL: *
define i32 *@addr_G() {
entry:
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