[llvm-commits] [llvm] r78657 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

[Evan Cheng]

Author: evancheng
Date: Tue Aug 11 03:47:46 2009
New Revision: 78657

URL: http://llvm.org/viewvc/llvm-project?rev=78657&view=rev
Log:
80 column violation.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=78657&r1=78656&r2=78657&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Aug 11 03:47:46 2009
@@ -597,8 +597,8 @@
 
 // Store doubleword
 let mayLoad = 1 in
-def t2STRDi8 : T2Ii8s4<(outs), (ins GPR:$src, t2addrmode_imm8s4:$addr),  IIC_iStore,
-                        "strd", " $src, $addr", []>;
+def t2STRDi8 : T2Ii8s4<(outs), (ins GPR:$src, t2addrmode_imm8s4:$addr),
+               IIC_iStore, "strd", " $src, $addr", []>;
 
 // Indexed stores
 def t2STR_PRE  : T2Iidxldst<(outs GPR:$base_wb),