[llvm-commits] [llvm] r78376 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/Thumb2/2009-08-07-CoalescerBug.ll

[Evan Cheng]

Author: evancheng
Date: Fri Aug  7 02:14:14 2009
New Revision: 78376

URL: http://llvm.org/viewvc/llvm-project?rev=78376&view=rev
Log:
Another coalescer bug. When a dead copy is eliminated, transfer the kill to a def of the exact register rather than a super-register.

Added:
    llvm/trunk/test/CodeGen/Thumb2/2009-08-07-CoalescerBug.ll
Modified:
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=78376&r1=78375&r2=78376&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Fri Aug  7 02:14:14 2009
@@ -888,12 +888,13 @@
   MachineInstr *DefMI =
     li_->getInstructionFromIndex(li_->getDefIndex(LRStart));
   if (DefMI && DefMI != CopyMI) {
-    int DeadIdx = DefMI->findRegisterDefOperandIdx(li.reg, false, tri_);
-    if (DeadIdx != -1) {
+    int DeadIdx = DefMI->findRegisterDefOperandIdx(li.reg, false);
+    if (DeadIdx != -1)
       DefMI->getOperand(DeadIdx).setIsDead();
-      // A dead def should have a single cycle interval.
-      ++LRStart;
-    }
+    else
+      DefMI->addOperand(MachineOperand::CreateReg(li.reg,
+                                                  true, true, false, true));
+    ++LRStart;
   }
 }
 

Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-07-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-07-CoalescerBug.ll?rev=78376&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/2009-08-07-CoalescerBug.ll (added)
+++ llvm/trunk/test/CodeGen/Thumb2/2009-08-07-CoalescerBug.ll Fri Aug  7 02:14:14 2009
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -mtriple=armv7-eabi -mattr=+vfp2
+; PR4686
+
+	%a = type { i32 (...)** }
+	%b = type { %a }
+	%c = type { float, float, float, float }
+
+declare arm_aapcs_vfpcc float @bar(%c*)
+
+define arm_aapcs_vfpcc void @foo(%b* %x, %c* %y) {
+entry:
+	%0 = call arm_aapcs_vfpcc  float @bar(%c* %y)		; <float> [#uses=0]
+	%1 = fadd float undef, undef		; <float> [#uses=1]
+	store float %1, float* undef, align 8
+	ret void
+}