[llvm-commits] [llvm] r78232 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

[Anton Korobeynikov]

Author: asl
Date: Wed Aug  5 14:40:16 2009
New Revision: 78232

URL: http://llvm.org/viewvc/llvm-project?rev=78232&view=rev
Log:
Unbreak the stuff, this is ugly, but we cannot do better for now with 'plain' C calling conv.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=78232&r1=78231&r2=78232&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Aug  5 14:40:16 2009
@@ -1460,13 +1460,12 @@
 
       } else {
         TargetRegisterClass *RC;
-        bool IsHardFloatCC = (CallConv == CallingConv::ARM_AAPCS_VFP);
 
-        if (IsHardFloatCC && RegVT == MVT::f32)
+        if (FloatABIType == FloatABI::Hard && RegVT == MVT::f32)
           RC = ARM::SPRRegisterClass;
-        else if (IsHardFloatCC && RegVT == MVT::f64)
+        else if (FloatABIType == FloatABI::Hard && RegVT == MVT::f64)
           RC = ARM::DPRRegisterClass;
-        else if (IsHardFloatCC && RegVT == MVT::v2f64)
+        else if (FloatABIType == FloatABI::Hard && RegVT == MVT::v2f64)
           RC = ARM::QPRRegisterClass;
         else if (AFI->isThumb1OnlyFunction())
           RC = ARM::tGPRRegisterClass;
@@ -1474,7 +1473,7 @@
           RC = ARM::GPRRegisterClass;
 
         assert((RegVT == MVT::i32 || RegVT == MVT::f32 ||
-                (IsHardFloatCC &&
+                (FloatABIType == FloatABI::Hard &&
                  ((RegVT == MVT::f64) || (RegVT == MVT::v2f64)))) &&
                "RegVT not supported by FORMAL_ARGUMENTS Lowering");