[llvm-commits] [llvm] r78142 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/ test/CodeGen/X86/

Sanjiv Gupta sanjiv.gupta at microchip.com
Wed Aug 5 08:56:28 PDT 2009


Hi Dan,
This causes an assert in quite a few of our tests for codegen.
I just added one as test/CodeGen/PIC16/sext.ll

- Sanjiv

Dan Gohman wrote:
> Author: djg
> Date: Tue Aug  4 20:29:28 2009
> New Revision: 78142
>
> URL: http://llvm.org/viewvc/llvm-project?rev=78142&view=rev
> Log:
> Major calling convention code refactoring.
>
> Instead of awkwardly encoding calling-convention information with ISD::CALL,
> ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
> provides three virtual functions for targets to override:
> LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
> lowering done on the special nodes. They provide the same information, but
> in a more immediately usable format.
>
> This also reworks much of the target-independent tail call logic. The
> decision of whether or not to perform a tail call is now cleanly split
> between target-independent portions, and the target dependent portion
> in IsEligibleForTailCallOptimization.
>
> This also synchronizes all in-tree targets, to help enable future
> refactoring and feature work.
>
>   




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