[llvm-commits] [llvm] r78144 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll

[Evan Cheng]

Author: evancheng
Date: Tue Aug  4 20:57:22 2009
New Revision: 78144

URL: http://llvm.org/viewvc/llvm-project?rev=78144&view=rev
Log:
One more place where subreg lowering forgot to transfer undefness.

Added:
    llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
Modified:
    llvm/trunk/lib/CodeGen/LowerSubregs.cpp

Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=78144&r1=78143&r2=78144&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original)
+++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Tue Aug  4 20:57:22 2009
@@ -242,9 +242,12 @@
     // No need to insert an identity copy instruction. If the SrcReg was
     // <undef>, we need to make sure it is alive by inserting an IMPLICIT_DEF
     if (MI->getOperand(1).isUndef() && !MI->getOperand(0).isDead()) {
-      BuildMI(*MBB, MI, MI->getDebugLoc(),
-              TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg)
-        .addReg(InsReg, RegState::ImplicitKill);
+      MachineInstrBuilder MIB = BuildMI(*MBB, MI, MI->getDebugLoc(),
+                                TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg);
+      if (MI->getOperand(2).isUndef())
+        MIB.addReg(InsReg, RegState::Implicit | RegState::Undef);
+      else
+        MIB.addReg(InsReg, RegState::ImplicitKill);
     } else {
       DOUT << "subreg: eliminated!\n";
       MBB->erase(MI);

Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll?rev=78144&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll (added)
+++ llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll Tue Aug  4 20:57:22 2009
@@ -0,0 +1,42 @@
+; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp
+; rdar://7117307
+
+	%struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
+	%struct.List = type { %struct.List*, %struct.Patient*, %struct.List* }
+	%struct.Patient = type { i32, i32, i32, %struct.Village* }
+	%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
+
+define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
+entry:
+	br i1 undef, label %bb14, label %bb3.preheader
+
+bb3.preheader:		; preds = %entry
+	br label %bb5
+
+bb5:		; preds = %bb5, %bb3.preheader
+	br i1 undef, label %bb11, label %bb5
+
+bb11:		; preds = %bb5
+	%0 = fmul float undef, 0x41E0000000000000		; <float> [#uses=1]
+	%1 = fptosi float %0 to i32		; <i32> [#uses=1]
+	store i32 %1, i32* undef, align 4
+	br i1 undef, label %generate_patient.exit, label %generate_patient.exit.thread
+
+generate_patient.exit.thread:		; preds = %bb11
+	ret %struct.List* null
+
+generate_patient.exit:		; preds = %bb11
+	br i1 undef, label %bb14, label %bb12
+
+bb12:		; preds = %generate_patient.exit
+	br i1 undef, label %bb.i, label %bb1.i
+
+bb.i:		; preds = %bb12
+	ret %struct.List* null
+
+bb1.i:		; preds = %bb12
+	ret %struct.List* null
+
+bb14:		; preds = %generate_patient.exit, %entry
+	ret %struct.List* undef
+}