[llvm-commits] [llvm] r78082 - /llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
Sanjiv Gupta
sanjiv.gupta at microchip.com
Tue Aug 4 10:59:29 PDT 2009
Author: sgupta
Date: Tue Aug 4 12:59:16 2009
New Revision: 78082
URL: http://llvm.org/viewvc/llvm-project?rev=78082&view=rev
Log:
Legalize i64 store operations generated by inst-combine.
Modified:
llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=78082&r1=78081&r2=78082&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Tue Aug 4 12:59:16 2009
@@ -253,6 +253,7 @@
setOperationAction(ISD::STORE, MVT::i8, Legal);
setOperationAction(ISD::STORE, MVT::i16, Custom);
setOperationAction(ISD::STORE, MVT::i32, Custom);
+ setOperationAction(ISD::STORE, MVT::i64, Custom);
setOperationAction(ISD::ADDE, MVT::i8, Custom);
setOperationAction(ISD::ADDC, MVT::i8, Custom);
@@ -593,8 +594,25 @@
getChain(Store3), getChain(Store4));
return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, RetLo, RetHi);
- }
- else {
+ } else if (ValueType == MVT::i64) {
+ SDValue SrcLo, SrcHi;
+ GetExpandedParts(Src, DAG, SrcLo, SrcHi);
+ SDValue ChainLo = Chain, ChainHi = Chain;
+ if (Chain.getOpcode() == ISD::TokenFactor) {
+ ChainLo = Chain.getOperand(0);
+ ChainHi = Chain.getOperand(1);
+ }
+ SDValue Store1 = DAG.getStore(ChainLo, dl, SrcLo, Ptr, NULL,
+ 0 + StoreOffset);
+
+ Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
+ DAG.getConstant(4, Ptr.getValueType()));
+ SDValue Store2 = DAG.getStore(ChainHi, dl, SrcHi, Ptr, NULL,
+ 1 + StoreOffset);
+
+ return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1,
+ Store2);
+ } else {
assert (0 && "value type not supported");
return SDValue();
}
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