[llvm-commits] [llvm] r77701 - in /llvm/trunk/lib/Target/ARM: ARMBaseInstrInfo.cpp ARMConstantIslandPass.cpp
Evan Cheng
evan.cheng at apple.com
Fri Jul 31 11:28:05 PDT 2009
Author: evancheng
Date: Fri Jul 31 13:28:05 2009
New Revision: 77701
URL: http://llvm.org/viewvc/llvm-project?rev=77701&view=rev
Log:
- Teach TBB / TBH offset limits are 510 and 131070 respectively since the offset
is scaled by two.
- Teach GetInstSizeInBytes about TBB and TBH.
Modified:
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=77701&r1=77700&r2=77701&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Fri Jul 31 13:28:05 2009
@@ -446,9 +446,14 @@
case ARM::BR_JTr:
case ARM::BR_JTm:
case ARM::BR_JTadd:
- case ARM::t2BR_JT: {
+ case ARM::t2BR_JT:
+ case ARM::t2TBB:
+ case ARM::t2TBH: {
// These are jumptable branches, i.e. a branch followed by an inlined
- // jumptable. The size is 4 + 4 * number of entries.
+ // jumptable. The size is 4 + 4 * number of entries. For TBB, each
+ // entry is one byte; TBH two byte each.
+ unsigned EntrySize = (MI->getOpcode() == ARM::t2TBB)
+ ? 1 : ((MI->getOpcode() == ARM::t2TBH) ? 2 : 4);
unsigned NumOps = TID.getNumOperands();
MachineOperand JTOP =
MI->getOperand(NumOps - (TID.isPredicable() ? 3 : 2));
@@ -463,7 +468,7 @@
// FIXME: If we know the size of the function is less than (1 << 16) *2
// bytes, we can use 16-bit entries instead. Then there won't be an
// alignment issue.
- return getNumJTEntries(JT, JTI) * 4 + (IsThumb1JT ? 2 : 4);
+ return getNumJTEntries(JT, JTI) * EntrySize + (IsThumb1JT ? 2 : 4);
}
default:
// Otherwise, pseudo-instruction sizes are zero.
Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=77701&r1=77700&r2=77701&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Fri Jul 31 13:28:05 2009
@@ -237,10 +237,10 @@
// the numbers agree with the position of the block in the function.
MF.RenumberBlocks();
- // Thumb1 functions containing constant pools get 2-byte alignment.
+ // Thumb1 functions containing constant pools get 4-byte alignment.
// This is so we can keep exact track of where the alignment padding goes.
- // Set default. Thumb1 function is 1-byte aligned, ARM and Thumb2 are 2-byte
+ // Set default. Thumb1 function is 2-byte aligned, ARM and Thumb2 are 4-byte
// aligned.
AFI->setAlign(isThumb1 ? 1U : 2U);
@@ -1360,10 +1360,9 @@
unsigned DstOffset = BBOffsets[MBB->getNumber()];
// Negative offset is not ok. FIXME: We should change BB layout to make
// sure all the branches are forward.
- if (ByteOk && !OffsetIsInRange(JTOffset, DstOffset, (1<<8)-1, false))
+ if (ByteOk && (DstOffset - JTOffset) > ((1<<8)-1)*2)
ByteOk = false;
- if (HalfWordOk &&
- !OffsetIsInRange(JTOffset, DstOffset, (1<<16)-1, false))
+ if (HalfWordOk && (DstOffset - JTOffset) > ((1<<16)-1)*2)
HalfWordOk = false;
if (!ByteOk && !HalfWordOk)
break;
@@ -1415,7 +1414,8 @@
.addReg(IdxReg, getKillRegState(IdxRegKill))
.addJumpTableIndex(JTI, JTOP.getTargetFlags())
.addImm(MI->getOperand(JTOpIdx+1).getImm()));
-
+ // FIXME: Insert an "ALIGN" instruction to ensure the next instruction
+ // is 2-byte aligned. For now, asm printer will fix it up.
AddrMI->eraseFromParent();
if (LeaMI)
LeaMI->eraseFromParent();
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