[llvm-commits] CVS: llvm-www/www-index.html Features.html

[Chris Lattner]

Changes in directory llvm-www:

www-index.html updated: 1.179 -> 1.180
Features.html updated: 1.22 -> 1.23
---
Log message:

ia64 is out, many other targets are in.


---
Diffs of the changes:  (+6 -6)

 Features.html  |    3 ++-
 www-index.html |    9 ++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)


Index: llvm-www/www-index.html
diff -u llvm-www/www-index.html:1.179 llvm-www/www-index.html:1.180
--- llvm-www/www-index.html:1.179	Tue Jul 14 15:38:22 2009
+++ llvm-www/www-index.html	Fri Jul 31 01:30:35 2009
@@ -33,11 +33,10 @@
 compilation strategy. The primary components of the LLVM infrastructure are a
 GCC-based <a href="docs/CommandGuide/html/llvmgcc.html">C & C++
 front-end</a>, a link-time optimization framework with a growing set of global
-and interprocedural analyses and transformations, static back-ends for the X86,
-X86-64, PowerPC 32/64, ARM, Thumb, IA-64, Alpha, SPARC, MIPS and CellSPU 
-architectures, 
-a back-end which emits portable C code, and a Just-In-Time compiler for X86,
-X86-64, PowerPC 32/64 processors, and an emitter for MSIL.</p></li>
+and interprocedural analyses and transformations, static back-ends for 
+<a href="Features.html">many popular (and some obscure)</a> architectures,
+a back-end which emits portable C code, and a Just-In-Time compilers for
+several architectures.</p></li>
 
 <li><p>LLVM does <i>not</i> imply things that you would expect from a 
 high-level virtual machine.  It does not require garbage collection or 


Index: llvm-www/Features.html
diff -u llvm-www/Features.html:1.22 llvm-www/Features.html:1.23
--- llvm-www/Features.html:1.22	Sun Mar 29 01:45:28 2009
+++ llvm-www/Features.html	Fri Jul 31 01:30:36 2009
@@ -26,7 +26,8 @@
   optimizations.</li>
 
   <li>An easily retargettable code generator, which currently supports X86, 
-      X86-64, PowerPC, PowerPC-64, ARM, Thumb, SPARC, Alpha, and IA-64.</li>
+      X86-64, PowerPC, PowerPC-64, ARM, Thumb, SPARC, Alpha, CellSPU, PIC16
+      MIPS, MSP430, SystemZ, and XCore.</li>
 
   <li>A Just-In-Time (JIT) code generation system, which currently supports 
   X86, X86-64, PowerPC and PowerPC-64.</li>