[llvm-commits] [llvm] r77507 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.td ARMInstrThumb.td ARMInstrThumb2.td

Evan Cheng evan.cheng at apple.com
Wed Jul 29 14:26:42 PDT 2009


Author: evancheng
Date: Wed Jul 29 16:26:42 2009
New Revision: 77507

URL: http://llvm.org/viewvc/llvm-project?rev=77507&view=rev
Log:
Make sure Thumb2 uses the right call instructions.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=77507&r1=77506&r2=77507&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Jul 29 16:26:42 2009
@@ -614,16 +614,19 @@
           D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
   def BL  : ABXI<0b1011, (outs), (ins i32imm:$func, variable_ops),
                 "bl ${func:call}",
-                [(ARMcall tglobaladdr:$func)]>, Requires<[IsNotDarwin]>;
+                [(ARMcall tglobaladdr:$func)]>,
+            Requires<[IsARM, IsNotDarwin]>;
 
   def BL_pred : ABI<0b1011, (outs), (ins i32imm:$func, variable_ops),
                    "bl", " ${func:call}",
-                   [(ARMcall_pred tglobaladdr:$func)]>, Requires<[IsNotDarwin]>;
+                   [(ARMcall_pred tglobaladdr:$func)]>,
+                Requires<[IsARM, IsNotDarwin]>;
 
   // ARMv5T and above
   def BLX : AXI<(outs), (ins GPR:$func, variable_ops), BrMiscFrm,
                 "blx $func",
-                [(ARMcall GPR:$func)]>, Requires<[IsARM, HasV5T, IsNotDarwin]> {
+                [(ARMcall GPR:$func)]>,
+            Requires<[IsARM, HasV5T, IsNotDarwin]> {
     let Inst{7-4}   = 0b0011;
     let Inst{19-8}  = 0b111111111111;
     let Inst{27-20} = 0b00010010;
@@ -632,7 +635,8 @@
   // ARMv4T
   def BX : ABXIx2<(outs), (ins GPR:$func, variable_ops),
                    "mov lr, pc\n\tbx $func",
-                  [(ARMcall_nolink GPR:$func)]>, Requires<[IsNotDarwin]> {
+                  [(ARMcall_nolink GPR:$func)]>,
+           Requires<[IsARM, IsNotDarwin]> {
     let Inst{7-4}   = 0b0001;
     let Inst{19-8}  = 0b111111111111;
     let Inst{27-20} = 0b00010010;
@@ -647,11 +651,12 @@
           D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
   def BLr9  : ABXI<0b1011, (outs), (ins i32imm:$func, variable_ops),
                 "bl ${func:call}",
-                [(ARMcall tglobaladdr:$func)]>, Requires<[IsDarwin]>;
+                [(ARMcall tglobaladdr:$func)]>, Requires<[IsARM, IsDarwin]>;
 
   def BLr9_pred : ABI<0b1011, (outs), (ins i32imm:$func, variable_ops),
                    "bl", " ${func:call}",
-                   [(ARMcall_pred tglobaladdr:$func)]>, Requires<[IsDarwin]>;
+                   [(ARMcall_pred tglobaladdr:$func)]>,
+                  Requires<[IsARM, IsDarwin]>;
 
   // ARMv5T and above
   def BLXr9 : AXI<(outs), (ins GPR:$func, variable_ops), BrMiscFrm,
@@ -1441,9 +1446,9 @@
 
 // Direct calls
 def : ARMPat<(ARMcall texternalsym:$func), (BL texternalsym:$func)>,
-      Requires<[IsNotDarwin]>;
+      Requires<[IsARM, IsNotDarwin]>;
 def : ARMPat<(ARMcall texternalsym:$func), (BLr9 texternalsym:$func)>,
-      Requires<[IsDarwin]>;
+      Requires<[IsARM, IsDarwin]>;
 
 // zextload i1 -> zextload i8
 def : ARMPat<(zextloadi1 addrmode2:$addr),  (LDRB addrmode2:$addr)>;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=77507&r1=77506&r2=77507&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Wed Jul 29 16:26:42 2009
@@ -172,18 +172,54 @@
           D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
   def tBL  : T1Ix2<(outs), (ins i32imm:$func, variable_ops),
                    "bl ${func:call}",
-                   [(ARMtcall tglobaladdr:$func)]>;
+                   [(ARMtcall tglobaladdr:$func)]>,
+             Requires<[IsThumb1Only, IsNotDarwin]>;
+
   // ARMv5T and above
   def tBLXi : T1Ix2<(outs), (ins i32imm:$func, variable_ops),
                     "blx ${func:call}",
-                    [(ARMcall tglobaladdr:$func)]>, Requires<[HasV5T]>;
+                    [(ARMcall tglobaladdr:$func)]>,
+              Requires<[IsThumb1Only, HasV5T, IsNotDarwin]>;
+
   def tBLXr : T1I<(outs), (ins tGPR:$func, variable_ops),
                   "blx $func",
-                  [(ARMtcall tGPR:$func)]>, Requires<[HasV5T]>;
+                  [(ARMtcall tGPR:$func)]>,
+              Requires<[IsThumb1Only, HasV5T, IsNotDarwin]>;
+
   // ARMv4T
   def tBX : T1Ix2<(outs), (ins tGPR:$func, variable_ops),
                   "mov lr, pc\n\tbx $func",
-                  [(ARMcall_nolink tGPR:$func)]>;
+                  [(ARMcall_nolink tGPR:$func)]>,
+            Requires<[IsThumb1Only, IsNotDarwin]>;
+}
+
+// On Darwin R9 is call-clobbered.
+let isCall = 1,
+  Defs = [R0,  R1,  R2,  R3,  R9,  R12, LR,
+          D0,  D1,  D2,  D3,  D4,  D5,  D6,  D7,
+          D16, D17, D18, D19, D20, D21, D22, D23,
+          D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
+  def tBLr9 : T1Ix2<(outs), (ins i32imm:$func, variable_ops),
+                   "bl ${func:call}",
+                   [(ARMtcall tglobaladdr:$func)]>,
+             Requires<[IsThumb1Only, IsDarwin]>;
+
+  // ARMv5T and above
+  def tBLXi_r9 : T1Ix2<(outs), (ins i32imm:$func, variable_ops),
+                      "blx ${func:call}",
+                      [(ARMcall tglobaladdr:$func)]>,
+                 Requires<[IsThumb1Only, HasV5T, IsDarwin]>;
+
+  def tBLXr_r9 : T1I<(outs), (ins tGPR:$func, variable_ops),
+                  "blx $func",
+                  [(ARMtcall tGPR:$func)]>,
+                 Requires<[IsThumb1Only, HasV5T, IsDarwin]>;
+
+  // ARMv4T
+  def tBXr9 : T1Ix2<(outs), (ins tGPR:$func, variable_ops),
+                  "mov lr, pc\n\tbx $func",
+                  [(ARMcall_nolink tGPR:$func)]>,
+              Requires<[IsThumb1Only, IsDarwin]>;
 }
 
 let isBranch = 1, isTerminator = 1 in {
@@ -599,11 +635,21 @@
             (tLEApcrelJT tjumptable:$dst, imm:$id)>;
 
 // Direct calls
-def : T1Pat<(ARMtcall texternalsym:$func), (tBL texternalsym:$func)>;
-def : Tv5Pat<(ARMcall texternalsym:$func), (tBLXi texternalsym:$func)>;
+def : T1Pat<(ARMtcall texternalsym:$func), (tBL texternalsym:$func)>,
+      Requires<[IsThumb1Only, IsNotDarwin]>;
+def : T1Pat<(ARMtcall texternalsym:$func), (tBLr9 texternalsym:$func)>,
+      Requires<[IsThumb1Only, IsDarwin]>;
+
+def : Tv5Pat<(ARMcall texternalsym:$func), (tBLXi texternalsym:$func)>,
+      Requires<[IsThumb1Only, HasV5T, IsNotDarwin]>;
+def : Tv5Pat<(ARMcall texternalsym:$func), (tBLXi_r9 texternalsym:$func)>,
+      Requires<[IsThumb1Only, HasV5T, IsDarwin]>;
 
 // Indirect calls to ARM routines
-def : Tv5Pat<(ARMcall tGPR:$dst), (tBLXr tGPR:$dst)>;
+def : Tv5Pat<(ARMcall tGPR:$dst), (tBLXr tGPR:$dst)>,
+      Requires<[IsThumb1Only, HasV5T, IsNotDarwin]>;
+def : Tv5Pat<(ARMcall tGPR:$dst), (tBLXr_r9 tGPR:$dst)>,
+      Requires<[IsThumb1Only, HasV5T, IsDarwin]>;
 
 // zextload i1 -> zextload i8
 def : T1Pat<(zextloadi1 t_addrmode_s1:$addr),

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=77507&r1=77506&r2=77507&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Jul 29 16:26:42 2009
@@ -1027,11 +1027,13 @@
           D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
 def t2BL  : T2XI<(outs), (ins i32imm:$func, variable_ops),
                  "bl ${func:call}",
-                  [(ARMcall tglobaladdr:$func)]>, Requires<[IsNotDarwin]>;
+                  [(ARMcall tglobaladdr:$func)]>,
+            Requires<[IsThumb2, IsNotDarwin]>;
 
 def t2BLX : T2XI<(outs), (ins GPR:$func, variable_ops),
                 "blx $func",
-                [(ARMcall GPR:$func)]>, Requires<[IsNotDarwin]>;
+                [(ARMcall GPR:$func)]>,
+            Requires<[IsThumb2, IsNotDarwin]>;
 }
 
 // On Darwin R9 is call-clobbered.
@@ -1041,11 +1043,13 @@
           D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
 def t2BLr9  : T2XI<(outs), (ins i32imm:$func, variable_ops),
                   "bl ${func:call}",
-                  [(ARMcall tglobaladdr:$func)]>, Requires<[IsDarwin]>;
+                  [(ARMcall tglobaladdr:$func)]>,
+              Requires<[IsThumb2, IsDarwin]>;
 
 def t2BLXr9 : T2XI<(outs), (ins GPR:$func, variable_ops),
                   "blx $func",
-                  [(ARMcall GPR:$func)]>, Requires<[IsDarwin]>;
+                  [(ARMcall GPR:$func)]>,
+              Requires<[IsThumb2, IsDarwin]>;
 }
 
 let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
@@ -1101,3 +1105,9 @@
 
 def : T2Pat<(i32 imm:$src),
             (t2MOVTi16 (t2MOVi16 (t2_lo16 imm:$src)), (t2_hi16 imm:$src))>;
+
+// Direct calls
+def : T2Pat<(ARMcall texternalsym:$func), (t2BL texternalsym:$func)>,
+      Requires<[IsThumb2, IsNotDarwin]>;
+def : T2Pat<(ARMcall texternalsym:$func), (t2BLr9 texternalsym:$func)>,
+      Requires<[IsThumb2, IsDarwin]>;





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