[llvm-commits] [llvm] r77407 - in /llvm/trunk: include/llvm/IntrinsicsX86.td lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/sse41.ll

[Evan Cheng]

On Jul 28, 2009, at 10:52 PM, Chris Lattner wrote:

>
>
> Yes, that would be a very sensible thing to do!  This is actually a  
> phase ordering thing that is occurring.  In dagcombine1, we have:
>
> <pastedGraphic.png>
>
>
> After dagcombine1, the ptestz and setcc's get lowered, and we have:
>
>
> <pastedGraphic.png>
>
>
> At this point, shrinking the X86ISD::CMPs is both more annoying  
> (because we don't easily know what flags are live) and target  
> specific.
>
> Two possible approaches:
>
> 1. The intrinsic could be declared to return i8 instead of i32, that  
> would be a hack around the problem, but would work be reasonable  
> since the X86 setcc instructions set an i8.
>
> 2. We could lower the ptestz intrinisic at sdisel time instead of in  
> legalize like we do for call and arguments.
>
> I don't see a reason not to do #2: it seems like a general win for  
> intrinsics that are lowered like this.  What do you guys think?

#2 makes sense to me.

Evan

>
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