[llvm-commits] [llvm] r76872 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
Evan Cheng
evan.cheng at apple.com
Thu Jul 23 00:59:14 PDT 2009
Author: evancheng
Date: Thu Jul 23 02:58:08 2009
New Revision: 76872
URL: http://llvm.org/viewvc/llvm-project?rev=76872&view=rev
Log:
80 col violation.
Modified:
llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=76872&r1=76871&r2=76872&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Thu Jul 23 02:58:08 2009
@@ -1407,11 +1407,13 @@
AFI->getDPRCalleeSavedAreaOffset()||
hasFP(MF)) {
if (NumBytes)
- BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::SUBri)), ARM::SP).addReg(FramePtr)
+ BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::SUBri)), ARM::SP)
+ .addReg(FramePtr)
.addImm(NumBytes)
.addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
else
- BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::MOVr)), ARM::SP).addReg(FramePtr)
+ BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::MOVr)), ARM::SP)
+ .addReg(FramePtr)
.addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
}
} else if (NumBytes) {
More information about the llvm-commits
mailing list