[llvm-commits] [llvm] r76803 - in /llvm/trunk: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll
Evan Cheng
evan.cheng at apple.com
Wed Jul 22 15:05:42 PDT 2009
I accidentally checked in two patches at the same time. The td file
changes are meant to privatize the .set labels.
Evan
On Jul 22, 2009, at 3:03 PM, Evan Cheng wrote:
> Author: evancheng
> Date: Wed Jul 22 17:03:29 2009
> New Revision: 76803
>
> URL: http://llvm.org/viewvc/llvm-project?rev=76803&view=rev
> Log:
> Use getTargetConstant instead of getConstant since it's meant as an
> constant operand.
>
> Added:
> llvm/trunk/test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll
> Modified:
> llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
> llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>
> Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=76803&r1=76802&r2=76803&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Wed Jul 22
> 17:03:29 2009
> @@ -954,7 +954,7 @@
> break;
> SDValue V = Op.getOperand(0);
> ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm);
> - SDValue ShImmOp = CurDAG->getConstant(ShImm, MVT::i32);
> + SDValue ShImmOp = CurDAG->getTargetConstant(ShImm, MVT::i32);
> SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
> if (Subtarget->isThumb()) {
> SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG), Reg0,
> Reg0 };
> @@ -970,7 +970,7 @@
> break;
> SDValue V = Op.getOperand(0);
> ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm);
> - SDValue ShImmOp = CurDAG->getConstant(ShImm, MVT::i32);
> + SDValue ShImmOp = CurDAG->getTargetConstant(ShImm, MVT::i32);
> SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
> if (Subtarget->isThumb()) {
> SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG), Reg0 };
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=76803&r1=76802&r2=76803&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Jul 22 17:03:29 2009
> @@ -558,19 +558,20 @@
> // LEApcrel - Load a pc-relative address into a register without
> offending the
> // assembler.
> def LEApcrel : AXI1<0x0, (outs GPR:$dst), (ins i32imm:$label, pred:
> $p), Pseudo,
> - !strconcat(!strconcat(".set PCRELV${:uid},
> ($label-(",
> - "${:private}PCRELL${:uid}
> +8))\n"),
> - !strconcat("${:private}PCRELL${:uid}:
> \n\t",
> - "add$p $dst, pc, #PCRELV$
> {:uid}")),
> + !strconcat(!strconcat(".set ${:private}PCRELV${:uid},
> ($label-(",
> + "${:private}PCRELL${:uid}+8))\n"),
> + !strconcat("${:private}PCRELL${:uid}:\n\t",
> + "add$p $dst, pc, #${:private}
> PCRELV${:uid}")),
> []>;
>
> def LEApcrelJT : AXI1<0x0, (outs GPR:$dst),
> (ins i32imm:$label, i32imm:$id, pred:$p),
> Pseudo,
> - !strconcat(!strconcat(".set PCRELV${:uid}, (${label}_$
> {id:no_hash}-(",
> - "${:private}PCRELL${:uid}
> +8))\n"),
> - !strconcat("${:private}PCRELL${:uid}:
> \n\t",
> - "add$p $dst, pc, #PCRELV$
> {:uid}")),
> + !strconcat(!strconcat(".set ${:private}PCRELV${:uid}, "
> + "(${label}_${id:no_hash}-(",
> + "${:private}PCRELL${:uid}+8))\n"),
> + !strconcat("${:private}PCRELL${:uid}:\n\t",
> + "add$p $dst, pc, #${:private}
> PCRELV${:uid}")),
> []> {
> let Inst{25} = 1;
> }
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=76803&r1=76802&r2=76803&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Wed Jul 22 17:03:29
> 2009
> @@ -554,16 +554,17 @@
> // assembler.
> let Defs = [CPSR] in {
> def tLEApcrel : T1Ix2<(outs tGPR:$dst), (ins i32imm:$label),
> - !strconcat(!strconcat(".set PCRELV${:uid},
> ($label-(",
> - "${:private}PCRELL${:uid}
> +4))\n"),
> - !strconcat("\tmovs $dst, #PCRELV$
> {:uid}\n",
> - "${:private}PCRELL${:uid}:\n\tadd
> $dst, pc")),
> + !strconcat(!strconcat(".set ${:private}PCRELV$
> {:uid}, ($label-(",
> + "${:private}PCRELL${:uid}+4))
> \n"),
> + !strconcat("\tmovs $dst, #${:private}
> PCRELV${:uid}\n",
> + "${:private}PCRELL${:uid}:\n\tadd
> $dst, pc")),
> []>;
>
> def tLEApcrelJT : T1Ix2<(outs tGPR:$dst), (ins i32imm:$label, i32imm:
> $id),
> - !strconcat(!strconcat(".set PCRELV${:uid}, (${label}_$
> {id:no_hash}-(",
> + !strconcat(!strconcat(".set ${:private}PCRELV${:uid},"
> + " (${label}_${id:no_hash}-(",
> "${:private}PCRELL${:uid}
> +4))\n"),
> - !strconcat("\tmovs $dst, #PCRELV${:uid}\n",
> + !strconcat("\tmovs $dst, #${:private}PCRELV$
> {:uid}\n",
> "${:private}PCRELL${:uid}:\n\tadd
> $dst, pc")),
> []>;
> }
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=76803&r1=76802&r2=76803&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Jul 22 17:03:29
> 2009
> @@ -450,18 +450,19 @@
> // LEApcrel - Load a pc-relative address into a register without
> offending the
> // assembler.
> def t2LEApcrel : T2XI<(outs GPR:$dst), (ins i32imm:$label, pred:$p),
> - !strconcat(!strconcat(".set PCRELV${:uid},
> ($label-(",
> + !strconcat(!strconcat(".set ${:private}PCRELV$
> {:uid}, ($label-(",
> "${:private}PCRELL${:uid}
> +8))\n"),
> !strconcat("${:private}PCRELL${:uid}:\n
> \t",
> - "add$p $dst, pc, #PCRELV$
> {:uid}")),
> + "add$p $dst, pc, #$
> {:private}PCRELV${:uid}")),
> []>;
>
> def t2LEApcrelJT : T2XI<(outs GPR:$dst),
> (ins i32imm:$label, i32imm:$id, pred:$p),
> - !strconcat(!strconcat(".set PCRELV${:uid}, (${label}_$
> {id:no_hash}-(",
> - "${:private}PCRELL${:uid}
> +8))\n"),
> - !strconcat("${:private}PCRELL${:uid}:
> \n\t",
> - "add$p $dst, pc, #PCRELV$
> {:uid}")),
> + !strconcat(!strconcat(".set ${:private}PCRELV${:uid},"
> + " (${label}_${id:no_hash}-(",
> + "${:private}PCRELL${:uid}+8))\n"),
> + !strconcat("${:private}PCRELL${:uid}:\n\t",
> + "add$p $dst, pc, #${:private}
> PCRELV${:uid}")),
> []>;
>
> // ADD rd, sp, #so_imm
>
> Added: llvm/trunk/test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll?rev=76803&view=auto
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll (added)
> +++ llvm/trunk/test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll Wed
> Jul 22 17:03:29 2009
> @@ -0,0 +1,95 @@
> +; RUN: llvm-as < %s | llc -march=arm
> +
> + %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
> + %struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*,
> %struct.cli_ac_node**, %struct.cli_ac_node* }
> + %struct.cli_ac_patt = type { i16*, i16*, i16, i16, i8, i32, i32,
> i8*, i8*, i32, i16, i16, i16, i16, %struct.cli_ac_alt**, i8, i16,
> %struct.cli_ac_patt*, %struct.cli_ac_patt* }
> + %struct.cli_bm_patt = type { i8*, i8*, i16, i16, i8*, i8*, i8,
> %struct.cli_bm_patt*, i16 }
> + %struct.cli_matcher = type { i16, i8, i8*, %struct.cli_bm_patt**,
> i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**,
> %struct.cli_ac_patt**, i32, i32, i32 }
> +
> +define arm_apcscc i32 @cli_ac_addsig(%struct.cli_matcher* nocapture
> %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts,
> i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist,
> i8* %offset, i8 zeroext %target) nounwind {
> +entry:
> + br i1 undef, label %bb126, label %bb1
> +
> +bb1: ; preds = %entry
> + br i1 undef, label %cli_calloc.exit.thread, label %cli_calloc.exit
> +
> +cli_calloc.exit.thread: ; preds = %bb1
> + ret i32 -114
> +
> +cli_calloc.exit: ; preds = %bb1
> + br i1 undef, label %bb52, label %bb4
> +
> +bb4: ; preds = %cli_calloc.exit
> + br i1 undef, label %bb.i, label %bb1.i3
> +
> +bb.i: ; preds = %bb4
> + unreachable
> +
> +bb1.i3: ; preds = %bb4
> + br i1 undef, label %bb2.i4, label %cli_strdup.exit
> +
> +bb2.i4: ; preds = %bb1.i3
> + ret i32 -114
> +
> +cli_strdup.exit: ; preds = %bb1.i3
> + br i1 undef, label %cli_calloc.exit54.thread, label
> %cli_calloc.exit54
> +
> +cli_calloc.exit54.thread: ; preds = %cli_strdup.exit
> + ret i32 -114
> +
> +cli_calloc.exit54: ; preds = %cli_strdup.exit
> + br label %bb45
> +
> +cli_calloc.exit70.thread: ; preds = %bb45
> + unreachable
> +
> +cli_calloc.exit70: ; preds = %bb45
> + br i1 undef, label %bb.i83, label %bb1.i84
> +
> +bb.i83: ; preds = %cli_calloc.exit70
> + unreachable
> +
> +bb1.i84: ; preds = %cli_calloc.exit70
> + br i1 undef, label %bb2.i85, label %bb17
> +
> +bb2.i85: ; preds = %bb1.i84
> + unreachable
> +
> +bb17: ; preds = %bb1.i84
> + br i1 undef, label %bb22, label %bb.nph
> +
> +bb.nph: ; preds = %bb17
> + br label %bb18
> +
> +bb18: ; preds = %bb18, %bb.nph
> + br i1 undef, label %bb18, label %bb22
> +
> +bb22: ; preds = %bb18, %bb17
> + %0 = getelementptr i8* null, i32 10 ; <i8*> [#uses=1]
> + %1 = bitcast i8* %0 to i16* ; <i16*> [#uses=1]
> + %2 = load i16* %1, align 2 ; <i16> [#uses=1]
> + %3 = add i16 %2, 1 ; <i16> [#uses=1]
> + %4 = zext i16 %3 to i32 ; <i32> [#uses=1]
> + %5 = mul i32 %4, 3 ; <i32> [#uses=1]
> + %6 = add i32 %5, -1 ; <i32> [#uses=1]
> + %7 = icmp eq i32 %6, undef ; <i1> [#uses=1]
> + br i1 %7, label %bb25, label %bb43.preheader
> +
> +bb43.preheader: ; preds = %bb22
> + br i1 undef, label %bb28, label %bb45
> +
> +bb25: ; preds = %bb22
> + unreachable
> +
> +bb28: ; preds = %bb43.preheader
> + unreachable
> +
> +bb45: ; preds = %bb43.preheader, %cli_calloc.exit54
> + br i1 undef, label %cli_calloc.exit70.thread, label
> %cli_calloc.exit70
> +
> +bb52: ; preds = %cli_calloc.exit
> + unreachable
> +
> +bb126: ; preds = %entry
> + ret i32 -117
> +}
>
>
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