[llvm-commits] [llvm] r76390 - in /llvm/trunk/lib/Target/ARM: ARMInstrVFP.td ARMRegisterInfo.td
Evan Cheng
evan.cheng at apple.com
Sun Jul 19 19:12:31 PDT 2009
Author: evancheng
Date: Sun Jul 19 21:12:31 2009
New Revision: 76390
URL: http://llvm.org/viewvc/llvm-project?rev=76390&view=rev
Log:
Model fpscr to prevent fcmped / fcmpezs etc from being deleted.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=76390&r1=76389&r2=76390&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Sun Jul 19 21:12:31 2009
@@ -103,6 +103,7 @@
[(set SPR:$dst, (fadd SPR:$a, SPR:$b))]>;
// These are encoded as unary instructions.
+let Defs = [FPSCR] in {
def FCMPED : ADuI<0b11101011, 0b0100, 0b1100, (outs), (ins DPR:$a, DPR:$b),
"fcmped", " $a, $b",
[(arm_cmpfp DPR:$a, DPR:$b)]>;
@@ -110,6 +111,7 @@
def FCMPES : ASuI<0b11101011, 0b0100, 0b1100, (outs), (ins SPR:$a, SPR:$b),
"fcmpes", " $a, $b",
[(arm_cmpfp SPR:$a, SPR:$b)]>;
+}
def FDIVD : ADbI<0b11101000, (outs DPR:$dst), (ins DPR:$a, DPR:$b),
"fdivd", " $dst, $a, $b",
@@ -170,6 +172,7 @@
"fabss", " $dst, $a",
[(set SPR:$dst, (fabs SPR:$a))]>;
+let Defs = [FPSCR] in {
def FCMPEZD : ADuI<0b11101011, 0b0101, 0b1100, (outs), (ins DPR:$a),
"fcmpezd", " $a",
[(arm_cmpfp0 DPR:$a)]>;
@@ -177,6 +180,7 @@
def FCMPEZS : ASuI<0b11101011, 0b0101, 0b1100, (outs), (ins SPR:$a),
"fcmpezs", " $a",
[(arm_cmpfp0 SPR:$a)]>;
+}
def FCVTDS : ASuI<0b11101011, 0b0111, 0b1100, (outs DPR:$dst), (ins SPR:$a),
"fcvtds", " $dst, $a",
@@ -389,7 +393,7 @@
// Misc.
//
-let Defs = [CPSR] in
+let Defs = [CPSR], Uses = [FPSCR] in
def FMSTAT : VFPAI<(outs), (ins), VFPMiscFrm, "fmstat", "", [(arm_fmstat)]> {
let Inst{27-20} = 0b11101111;
let Inst{19-16} = 0b0001;
Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td?rev=76390&r1=76389&r2=76390&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td Sun Jul 19 21:12:31 2009
@@ -106,7 +106,9 @@
def Q15 : ARMReg<15, "q15", [D30, D31]>;
// Current Program Status Register.
-def CPSR : ARMReg<0, "cpsr">;
+def CPSR : ARMReg<0, "cpsr">;
+
+def FPSCR : ARMReg<1, "fpscr">;
// Register classes.
//
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