[llvm-commits] [llvm] r76124 - in /llvm/trunk: lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h lib/Target/ARM/Thumb1InstrInfo.cpp lib/Target/ARM/Thumb1RegisterInfo.cpp lib/Target/ARM/Thumb2InstrInfo.cpp lib/Target/ARM/Thumb2InstrInfo.h test/CodeGen/Thumb2/2009-07-17-CrossRegClassCopy.ll

[Evan Cheng]

On Jul 16, 2009, at 4:26 PM, Anton Korobeynikov wrote:

>
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp Thu Jul 16  
> 18:26:06 2009
> @@ -47,16 +47,6 @@
>   : ARMBaseRegisterInfo(tii, sti) {
> }
>
> -static inline
> -const MachineInstrBuilder &AddDefaultPred(const MachineInstrBuilder  
> &MIB) {
> -  return MIB.addImm((int64_t)ARMCC::AL).addReg(0);
> -}
> -
> -static inline
> -const MachineInstrBuilder &AddDefaultCC(const MachineInstrBuilder  
> &MIB) {
> -  return MIB.addReg(ARM::CPSR);
> -}
> -

Anton, is this intended? That is wrong. In thumb1 mode, the default  
behavior is to modify CPSR. This is different from ARM and Thumb2.

Evan