[llvm-commits] [llvm] r76024 - /llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp

[Anton Korobeynikov]

Author: asl
Date: Thu Jul 16 09:21:41 2009
New Revision: 76024

URL: http://llvm.org/viewvc/llvm-project?rev=76024&view=rev
Log:
Implement FP regs spills / restores

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=76024&r1=76023&r2=76024&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp Thu Jul 16 09:21:41 2009
@@ -66,6 +66,10 @@
   else if (RC == &SystemZ::GR64RegClass ||
            RC == &SystemZ::ADDR64RegClass) {
     Opc = SystemZ::MOV64mr;
+  } else if (RC == &SystemZ::FP32RegClass) {
+    Opc = SystemZ::FMOV32mr;
+  } else if (RC == &SystemZ::FP64RegClass) {
+    Opc = SystemZ::FMOV64mr;
   } else
     assert(0 && "Unsupported regclass to store");
 
@@ -87,6 +91,10 @@
   else if (RC == &SystemZ::GR64RegClass ||
            RC == &SystemZ::ADDR64RegClass) {
     Opc = SystemZ::MOV64rm;
+  } else if (RC == &SystemZ::FP32RegClass) {
+    Opc = SystemZ::FMOV32rm;
+  } else if (RC == &SystemZ::FP64RegClass) {
+    Opc = SystemZ::FMOV64rm;
   } else
     assert(0 && "Unsupported regclass to store");
 
@@ -369,6 +377,12 @@
   case SystemZ::UCMP32rm:
     Opc = SystemZ::UCMP32rmy;
     break;
+  case SystemZ::FMOV32mr:
+    Opc = SystemZ::FMOV32mry;
+    break;
+  case SystemZ::FMOV64mr:
+    Opc = SystemZ::FMOV64mry;
+    break;
   default:
     break;
   }