[llvm-commits] [llvm] r75989 - in /llvm/trunk/lib/Target/SystemZ: SystemZInstrInfo.cpp SystemZInstrInfo.h SystemZRegisterInfo.cpp SystemZRegisterInfo.h

Anton Korobeynikov asl at math.spbu.ru
Thu Jul 16 07:09:56 PDT 2009


Author: asl
Date: Thu Jul 16 09:09:56 2009
New Revision: 75989

URL: http://llvm.org/viewvc/llvm-project?rev=75989&view=rev
Log:
Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes.

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
    llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=75989&r1=75988&r2=75989&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp Thu Jul 16 09:09:56 2009
@@ -323,3 +323,47 @@
 
   return get(Opc);
 }
+
+const TargetInstrDesc&
+SystemZInstrInfo::getLongDispOpc(unsigned Opc) const {
+  switch (Opc) {
+  case SystemZ::MOV32mr:
+    Opc = SystemZ::MOV32mry;
+    break;
+  case SystemZ::MOV32rm:
+    Opc = SystemZ::MOV32rmy;
+    break;
+  case SystemZ::MOVSX32rm16:
+    Opc = SystemZ::MOVSX32rm16y;
+    break;
+  case SystemZ::MOV32m8r:
+    Opc = SystemZ::MOV32m8ry;
+    break;
+  case SystemZ::MOV32m16r:
+    Opc = SystemZ::MOV32m16ry;
+    break;
+  case SystemZ::MOV64m8r:
+    Opc = SystemZ::MOV64m8ry;
+    break;
+  case SystemZ::MOV64m16r:
+    Opc = SystemZ::MOV64m16ry;
+    break;
+  case SystemZ::MOV64m32r:
+    Opc = SystemZ::MOV64m32ry;
+    break;
+  case SystemZ::MUL32rm:
+    Opc = SystemZ::MUL32rmy;
+    break;
+  case SystemZ::CMP32rm:
+    Opc = SystemZ::CMP32rmy;
+    break;
+  case SystemZ::UCMP32rm:
+    Opc = SystemZ::UCMP32rmy;
+    break;
+  default:
+    break;
+  }
+
+  return get(Opc);
+}
+

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h?rev=75989&r1=75988&r2=75989&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h Thu Jul 16 09:09:56 2009
@@ -67,6 +67,7 @@
                              const SmallVectorImpl<MachineOperand> &Cond) const;
 
   const TargetInstrDesc& getBrCond(SystemZCC::CondCodes CC) const;
+  const TargetInstrDesc& getLongDispOpc(unsigned Opc) const;
 };
 
 }

Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp?rev=75989&r1=75988&r2=75989&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp Thu Jul 16 09:09:56 2009
@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "SystemZ.h"
+#include "SystemZInstrInfo.h"
 #include "SystemZMachineFunctionInfo.h"
 #include "SystemZRegisterInfo.h"
 #include "SystemZSubtarget.h"
@@ -27,7 +28,7 @@
 using namespace llvm;
 
 SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm,
-                                         const TargetInstrInfo &tii)
+                                         const SystemZInstrInfo &tii)
   : SystemZGenRegisterInfo(SystemZ::ADJCALLSTACKUP, SystemZ::ADJCALLSTACKDOWN),
     TM(tm), TII(tii) {
 }
@@ -124,9 +125,14 @@
   // displacement field.
   MI.getOperand(i).ChangeToRegister(BasePtr, false);
 
-  // Offset is a 20-bit integer.
+  // Offset is a either 12-bit unsigned or 20-bit signed integer.
   // FIXME: handle "too long" displacements.
   int Offset = getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm();
+
+  // Check whether displacement is too long to fit into 12 bit zext field.
+  if (Offset < 0 || Offset >= 4096)
+    MI.setDesc(TII.getLongDispOpc(MI.getOpcode()));
+
   MI.getOperand(i+1).ChangeToImmediate(Offset);
 }
 

Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h?rev=75989&r1=75988&r2=75989&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h Thu Jul 16 09:09:56 2009
@@ -29,14 +29,14 @@
 }
 
 class SystemZSubtarget;
-class TargetInstrInfo;
+class SystemZInstrInfo;
 class Type;
 
 struct SystemZRegisterInfo : public SystemZGenRegisterInfo {
   SystemZTargetMachine &TM;
-  const TargetInstrInfo &TII;
+  const SystemZInstrInfo &TII;
 
-  SystemZRegisterInfo(SystemZTargetMachine &tm, const TargetInstrInfo &tii);
+  SystemZRegisterInfo(SystemZTargetMachine &tm, const SystemZInstrInfo &tii);
 
   /// Code Generation virtual methods...
   const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;





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