[llvm-commits] [llvm] r75974 - in /llvm/trunk/lib/Target/SystemZ: AsmPrinter/SystemZAsmPrinter.cpp SystemZInstrInfo.td SystemZRegisterInfo.h

[Anton Korobeynikov]

Author: asl
Date: Thu Jul 16 09:04:01 2009
New Revision: 75974

URL: http://llvm.org/viewvc/llvm-project?rev=75974&view=rev
Log:
Implement asmprinting for odd-even regpairs

Modified:
    llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
    llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h

Modified: llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp?rev=75974&r1=75973&r2=75974&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp Thu Jul 16 09:04:01 2009
@@ -181,11 +181,22 @@
                                      const char* Modifier) {
   const MachineOperand &MO = MI->getOperand(OpNum);
   switch (MO.getType()) {
-  case MachineOperand::MO_Register:
+  case MachineOperand::MO_Register: {
     assert (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
             "Virtual registers should be already mapped!");
-    O << '%' << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
+    unsigned Reg = MO.getReg();
+    if (Modifier && strncmp(Modifier, "subreg", 6) == 0) {
+      if (strncmp(Modifier + 7, "even", 4) == 0)
+        Reg = TRI->getSubReg(Reg, SystemZ::SUBREG_EVEN);
+      else if (strncmp(Modifier + 7, "odd", 3) == 0)
+        Reg = TRI->getSubReg(Reg, SystemZ::SUBREG_ODD);
+      else
+        assert(0 && "Invalid subreg modifier");
+    }
+
+    O << '%' << TRI->getAsmName(Reg);
     return;
+  }
   case MachineOperand::MO_Immediate:
     O << MO.getImm();
     return;

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=75974&r1=75973&r2=75974&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Thu Jul 16 09:04:01 2009
@@ -366,14 +366,14 @@
                      "lgr\t{$dst, $src}",
                      []>;
 def MOV128rr : Pseudo<(outs GR128:$dst), (ins GR128:$src),
-                     "# MOV128 PSEUDO!"
-                     "lgr\t{$dst:subreg_odd, $src:subreg_odd}\n"
-                     "lgr\t{$dst:subreg_even, $src:subreg_even}",
+                     "# MOV128 PSEUDO!\n"
+                     "\tlgr\t${dst:subreg_odd}, ${src:subreg_odd}\n"
+                     "\tlgr\t${dst:subreg_even}, ${src:subreg_even}",
                      []>;
 def MOV64rrP : Pseudo<(outs GR64P:$dst), (ins GR64P:$src),
-                     "# MOV64P PSEUDO!"
-                     "lr\t{$dst:subreg_odd, $src:subreg_odd}\n"
-                     "lr\t{$dst:subreg_even, $src:subreg_even}",
+                     "# MOV64P PSEUDO!\n"
+                     "\tlr\t${dst:subreg_odd}, ${src:subreg_odd}\n"
+                     "\tlr\t${dst:subreg_even}, ${src:subreg_even}",
                      []>;
 }
 
@@ -554,7 +554,7 @@
 
 // FIXME: Provide proper encoding!
 def ADD32ri16 : Pseudo<(outs GR32:$dst), (ins GR32:$src1, s16imm:$src2),
-                       "ahi\t{$dst, $src2:}",
+                       "ahi\t{$dst, $src2}",
                        [(set GR32:$dst, (add GR32:$src1, immSExt16:$src2)),
                         (implicit PSW)]>;
 def ADD32ri   : Pseudo<(outs GR32:$dst), (ins GR32:$src1, s32imm:$src2),

Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h?rev=75974&r1=75973&r2=75974&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h Thu Jul 16 09:04:01 2009
@@ -19,6 +19,15 @@
 
 namespace llvm {
 
+namespace SystemZ {
+  /// SubregIndex - The index of various sized subregister classes. Note that
+  /// these indices must be kept in sync with the class indices in the
+  /// SystemZRegisterInfo.td file.
+  enum SubregIndex {
+    SUBREG_32BIT = 1, SUBREG_EVEN = 1, SUBREG_ODD = 2
+  };
+}
+
 class SystemZSubtarget;
 class TargetInstrInfo;
 class Type;