[llvm-commits] [llvm] r75962 - in /llvm/trunk: lib/Target/SystemZ/SystemZISelLowering.cpp lib/Target/SystemZ/SystemZInstrInfo.td test/CodeGen/SystemZ/2009-05-29-InvalidRetResult.ll

[Anton Korobeynikov]

Author: asl
Date: Thu Jul 16 08:58:24 2009
New Revision: 75962

URL: http://llvm.org/viewvc/llvm-project?rev=75962&view=rev
Log:
Proper lower 'small' results

Added:
    llvm/trunk/test/CodeGen/SystemZ/2009-05-29-InvalidRetResult.ll
Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=75962&r1=75961&r2=75962&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Thu Jul 16 08:58:24 2009
@@ -361,10 +361,27 @@
 
   // Copy all of the result registers out of their specified physreg.
   for (unsigned i = 0; i != RVLocs.size(); ++i) {
-    Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(),
-                               RVLocs[i].getValVT(), InFlag).getValue(1);
+    CCValAssign &VA = RVLocs[i];
+
+    Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
+                               VA.getLocVT(), InFlag).getValue(1);
+    SDValue RetValue = Chain.getValue(0);
     InFlag = Chain.getValue(2);
-    ResultVals.push_back(Chain.getValue(0));
+
+    // If this is an 8/16/32-bit value, it is really passed promoted to 64
+    // bits. Insert an assert[sz]ext to capture this, then truncate to the
+    // right size.
+    if (VA.getLocInfo() == CCValAssign::SExt)
+      RetValue = DAG.getNode(ISD::AssertSext, dl, VA.getLocVT(), RetValue,
+                             DAG.getValueType(VA.getValVT()));
+    else if (VA.getLocInfo() == CCValAssign::ZExt)
+      RetValue = DAG.getNode(ISD::AssertZext, dl, VA.getLocVT(), RetValue,
+                             DAG.getValueType(VA.getValVT()));
+
+    if (VA.getLocInfo() != CCValAssign::Full)
+      RetValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), RetValue);
+
+    ResultVals.push_back(RetValue);
   }
 
   ResultVals.push_back(Chain);

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=75962&r1=75961&r2=75962&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Thu Jul 16 08:58:24 2009
@@ -304,7 +304,7 @@
 let isCall = 1 in
   // All calls clobber the non-callee saved registers (except R14 which we
   // handle separately). Uses for argument registers are added manually.
-  let Defs = [R0D, R1D, R3D, R4D, R5D] in {
+  let Defs = [R0D, R1D, R2D, R3D, R4D, R5D] in {
     def CALLi     : Pseudo<(outs), (ins i64imm:$dst, variable_ops),
                            "brasl\t%r14, $dst", [(SystemZcall imm:$dst)]>;
     def CALLr     : Pseudo<(outs), (ins ADDR64:$dst, variable_ops),

Added: llvm/trunk/test/CodeGen/SystemZ/2009-05-29-InvalidRetResult.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/2009-05-29-InvalidRetResult.ll?rev=75962&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/2009-05-29-InvalidRetResult.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/2009-05-29-InvalidRetResult.ll Thu Jul 16 08:58:24 2009
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define i32 @main() nounwind {
+entry:
+	%call = call i32 (...)* @random() nounwind		; <i32> [#uses=0]
+	unreachable
+}
+
+declare i32 @random(...)