[llvm-commits] [llvm] r75572 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp

[Jakob Stoklund Olesen]

On 14/07/2009, at 02.51, Evan Cheng wrote:

> Author: evancheng
> Date: Mon Jul 13 19:51:06 2009
> New Revision: 75572
>
> URL: http://llvm.org/viewvc/llvm-project?rev=75572&view=rev
> Log:
> Fix pr4544. When remating, make sure the destination register fits  
> the instruction definition. It may be mismatched due to sub-register  
> coalescing.
> No test case yet because the code doesn't trigger until 75408 is re- 
> applied.
>
> Modified:
>    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
>
> Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=75572&r1=75571&r2=75572&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Jul 13  
> 19:51:06 2009
> @@ -611,6 +611,17 @@
>   bool SawStore = false;
>   if (!DefMI->isSafeToMove(tii_, SawStore))
>     return false;
> +  if (TID.getNumDefs() != 1)
> +    return false;
> +  // Make sure the copy destination register class fits the  
> instruction
> +  // definition register class. The mismatch can happen as a result  
> of earlier
> +  // extract_subreg, insert_subreg, subreg_to_reg coalescing.
> +  const TargetRegisterClass *RC = getInstrOperandRegClass(tri_,  
> TID, 0);
> +  if (TargetRegisterInfo::isVirtualRegister(DstReg)) {
> +    if (mri_->getRegClass(DstReg) != RC)
> +      return false;


Should there be an "&& !RC->hasSubClass(mri_->getRegClass(DstReg))"  
here?

This method would be useful in TargetRegisterClass:

bool hasSubClassEq(const TargetRegisterClass *cs) const {
   return cs==this || hasSubClass(cs);
}

Regards,
/jakob