[llvm-commits] [llvm] r75409 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Eli Friedman
eli.friedman at gmail.com
Sat Jul 11 19:00:06 PDT 2009
Author: efriedma
Date: Sat Jul 11 21:00:05 2009
New Revision: 75409
URL: http://llvm.org/viewvc/llvm-project?rev=75409&view=rev
Log:
Remove check which is duplicated in
InstCombiner::visitSelectInstWithICmp.
Modified:
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=75409&r1=75408&r2=75409&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Sat Jul 11 21:00:05 2009
@@ -9474,26 +9474,6 @@
}
if (ICmpInst *IC = dyn_cast<ICmpInst>(SI.getCondition())) {
-
- // (x <s 0) ? -1 : 0 -> ashr x, 31
- if (TrueValC->isAllOnesValue() && FalseValC->isZero())
- if (ConstantInt *CmpCst = dyn_cast<ConstantInt>(IC->getOperand(1))) {
- if (IC->getPredicate() == ICmpInst::ICMP_SLT && CmpCst->isZero()) {
- // The comparison constant and the result are not neccessarily the
- // same width. Make an all-ones value by inserting a AShr.
- Value *X = IC->getOperand(0);
- uint32_t Bits = X->getType()->getScalarSizeInBits();
- Constant *ShAmt = Context->getConstantInt(X->getType(), Bits-1);
- Instruction *SRA = BinaryOperator::Create(Instruction::AShr, X,
- ShAmt, "ones");
- InsertNewInstBefore(SRA, SI);
-
- // Then cast to the appropriate width.
- return CastInst::CreateIntegerCast(SRA, SI.getType(), true);
- }
- }
-
-
// If one of the constants is zero (we know they can't both be) and we
// have an icmp instruction with zero, and we have an 'and' with the
// non-constant value, eliminate this whole mess. This corresponds to
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