[llvm-commits] [llvm] r75379 - in /llvm/trunk: include/llvm/ include/llvm/Analysis/ include/llvm/Support/ include/llvm/Target/ lib/Analysis/ lib/Analysis/IPA/ lib/AsmParser/ lib/Bitcode/Writer/ lib/CodeGen/ lib/CodeGen/AsmPrinter/ lib/CodeGen/SelectionDAG/ lib/ExecutionEngine/ lib/ExecutionEngine/Interpreter/ lib/ExecutionEngine/JIT/ lib/Linker/ lib/MC/ lib/Support/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Alpha/AsmPrinter/ lib/Target/CBackend/ lib/Target/CellSPU/ lib/Target/CellSPU/AsmPrinter/ lib/Targ...
Torok Edwin
edwintorok at gmail.com
Sat Jul 11 13:10:50 PDT 2009
Author: edwin
Date: Sat Jul 11 15:10:48 2009
New Revision: 75379
URL: http://llvm.org/viewvc/llvm-project?rev=75379&view=rev
Log:
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
Modified:
llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h
llvm/trunk/include/llvm/MDNode.h
llvm/trunk/include/llvm/Support/ErrorHandling.h
llvm/trunk/include/llvm/Support/InstVisitor.h
llvm/trunk/include/llvm/Support/PassNameParser.h
llvm/trunk/include/llvm/Target/TargetData.h
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp
llvm/trunk/lib/Analysis/AliasSetTracker.cpp
llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
llvm/trunk/lib/Analysis/ConstantFolding.cpp
llvm/trunk/lib/Analysis/IPA/Andersens.cpp
llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp
llvm/trunk/lib/Analysis/ScalarEvolution.cpp
llvm/trunk/lib/AsmParser/LLLexer.cpp
llvm/trunk/lib/AsmParser/LLParser.cpp
llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
llvm/trunk/lib/CodeGen/AsmPrinter/DIE.cpp
llvm/trunk/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp
llvm/trunk/lib/CodeGen/BranchFolding.cpp
llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp
llvm/trunk/lib/CodeGen/ELFWriter.cpp
llvm/trunk/lib/CodeGen/GCMetadata.cpp
llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/CodeGen/MachOCodeEmitter.cpp
llvm/trunk/lib/CodeGen/MachOWriter.cpp
llvm/trunk/lib/CodeGen/MachineInstr.cpp
llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp
llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp
llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp
llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h
llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp
llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp
llvm/trunk/lib/Linker/LinkItems.cpp
llvm/trunk/lib/Linker/LinkModules.cpp
llvm/trunk/lib/MC/MCAsmStreamer.cpp
llvm/trunk/lib/Support/APFloat.cpp
llvm/trunk/lib/Support/APInt.cpp
llvm/trunk/lib/Support/CommandLine.cpp
llvm/trunk/lib/Support/Dwarf.cpp
llvm/trunk/lib/Support/ErrorHandling.cpp
llvm/trunk/lib/Support/FoldingSet.cpp
llvm/trunk/lib/Target/ARM/ARM.h
llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp
llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp
llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp
llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
llvm/trunk/lib/Target/CBackend/CBackend.cpp
llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp
llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp
llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp
llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp
llvm/trunk/lib/Target/MSIL/MSILWriter.cpp
llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp
llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp
llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp
llvm/trunk/lib/Target/PIC16/PIC16.h
llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp
llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.cpp
llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp
llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp
llvm/trunk/lib/Target/PowerPC/PPCHazardRecognizers.cpp
llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/trunk/lib/Target/PowerPC/PPCJITInfo.cpp
llvm/trunk/lib/Target/PowerPC/PPCMachOWriterInfo.cpp
llvm/trunk/lib/Target/PowerPC/PPCPredicates.cpp
llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/trunk/lib/Target/Sparc/FPMover.cpp
llvm/trunk/lib/Target/Sparc/Sparc.h
llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp
llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp
llvm/trunk/lib/Target/TargetAsmInfo.cpp
llvm/trunk/lib/Target/TargetData.cpp
llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp
llvm/trunk/lib/Target/X86/X86FastISel.cpp
llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86JITInfo.cpp
llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
llvm/trunk/lib/Transforms/Instrumentation/RSProfiling.cpp
llvm/trunk/lib/Transforms/Scalar/GVN.cpp
llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
llvm/trunk/lib/Transforms/Scalar/SCCP.cpp
llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp
llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp
llvm/trunk/lib/VMCore/AsmWriter.cpp
llvm/trunk/lib/VMCore/AutoUpgrade.cpp
llvm/trunk/lib/VMCore/ConstantFold.cpp
llvm/trunk/lib/VMCore/Constants.cpp
llvm/trunk/lib/VMCore/Core.cpp
llvm/trunk/lib/VMCore/Instructions.cpp
llvm/trunk/lib/VMCore/PassManager.cpp
llvm/trunk/lib/VMCore/Type.cpp
llvm/trunk/lib/VMCore/ValueTypes.cpp
llvm/trunk/lib/VMCore/Verifier.cpp
Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h (original)
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
#define LLVM_ANALYSIS_SCALAREVOLUTION_EXPRESSIONS_H
#include "llvm/Analysis/ScalarEvolution.h"
+#include "llvm/Support/ErrorHandling.h"
namespace llvm {
class ConstantInt;
@@ -584,14 +585,12 @@
case scCouldNotCompute:
return ((SC*)this)->visitCouldNotCompute((const SCEVCouldNotCompute*)S);
default:
- assert(0 && "Unknown SCEV type!");
- abort();
+ LLVM_UNREACHABLE("Unknown SCEV type!");
}
}
RetVal visitCouldNotCompute(const SCEVCouldNotCompute *S) {
- assert(0 && "Invalid use of SCEVCouldNotCompute!");
- abort();
+ LLVM_UNREACHABLE("Invalid use of SCEVCouldNotCompute!");
return RetVal();
}
};
Modified: llvm/trunk/include/llvm/MDNode.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MDNode.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MDNode.h (original)
+++ llvm/trunk/include/llvm/MDNode.h Sat Jul 11 15:10:48 2009
@@ -25,6 +25,7 @@
#include "llvm/Type.h"
#include "llvm/ADT/FoldingSet.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ValueHandle.h"
namespace llvm {
@@ -119,8 +120,7 @@
virtual void destroyConstant();
virtual void replaceUsesOfWithOnConstant(Value *From, Value *To, Use *U) {
- assert(0 && "This should never be called because MDNodes have no ops");
- abort();
+ LLVM_UNREACHABLE("This should never be called because MDNodes have no ops");
}
/// Methods for support type inquiry through isa, cast, and dyn_cast:
Modified: llvm/trunk/include/llvm/Support/ErrorHandling.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ErrorHandling.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ErrorHandling.h (original)
+++ llvm/trunk/include/llvm/Support/ErrorHandling.h Sat Jul 11 15:10:48 2009
@@ -46,11 +46,11 @@
/// This function calls abort().
/// Call this after assert(0), so that compiler knows the path is not
/// reachable.
- void llvm_unreachable(void) NORETURN;
+ void llvm_unreachable(const char *msg=0) NORETURN;
}
#ifndef NDEBUG
-#define LLVM_UNREACHABLE(msg) do {cerr<<msg<<"\n";llvm_unreachable();}while(0)
+#define LLVM_UNREACHABLE(msg) llvm_unreachable(msg)
#else
#define LLVM_UNREACHABLE(msg) llvm_unreachable()
#endif
Modified: llvm/trunk/include/llvm/Support/InstVisitor.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/InstVisitor.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/InstVisitor.h (original)
+++ llvm/trunk/include/llvm/Support/InstVisitor.h Sat Jul 11 15:10:48 2009
@@ -14,6 +14,7 @@
#include "llvm/Function.h"
#include "llvm/Instructions.h"
#include "llvm/Module.h"
+#include "llvm/Support/ErrorHandling.h"
namespace llvm {
@@ -113,8 +114,7 @@
//
RetTy visit(Instruction &I) {
switch (I.getOpcode()) {
- default: assert(0 && "Unknown instruction type encountered!");
- abort();
+ default: LLVM_UNREACHABLE("Unknown instruction type encountered!");
// Build the switch statement using the Instruction.def file...
#define HANDLE_INST(NUM, OPCODE, CLASS) \
case Instruction::OPCODE: return \
Modified: llvm/trunk/include/llvm/Support/PassNameParser.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PassNameParser.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/PassNameParser.h (original)
+++ llvm/trunk/include/llvm/Support/PassNameParser.h Sat Jul 11 15:10:48 2009
@@ -24,6 +24,7 @@
#define LLVM_SUPPORT_PASS_NAME_PARSER_H
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Pass.h"
#include <algorithm>
#include <cstring>
@@ -67,7 +68,7 @@
if (findOption(P->getPassArgument()) != getNumOptions()) {
cerr << "Two passes with the same argument (-"
<< P->getPassArgument() << ") attempted to be registered!\n";
- abort();
+ llvm_unreachable();
}
addLiteralOption(P->getPassArgument(), P, P->getPassName());
}
Modified: llvm/trunk/include/llvm/Target/TargetData.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetData.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetData.h (original)
+++ llvm/trunk/include/llvm/Target/TargetData.h Sat Jul 11 15:10:48 2009
@@ -22,6 +22,7 @@
#include "llvm/Pass.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallVector.h"
#include <string>
@@ -111,9 +112,8 @@
/// @note This has to exist, because this is a pass, but it should never be
/// used.
TargetData() : ImmutablePass(&ID) {
- assert(0 && "ERROR: Bad TargetData ctor used. "
- "Tool did not specify a TargetData to use?");
- abort();
+ llvm_report_error("ERROR: Bad TargetData ctor used. "
+ "Tool did not specify a TargetData to use?");
}
/// Constructs a TargetData from a specification string. See init().
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Sat Jul 11 15:10:48 2009
@@ -14,6 +14,7 @@
#ifndef LLVM_TARGET_TARGETINSTRINFO_H
#define LLVM_TARGET_TARGETINSTRINFO_H
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetInstrDesc.h"
#include "llvm/CodeGen/MachineFunction.h"
@@ -428,8 +429,7 @@
/// point.
virtual void insertNoop(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const {
- assert(0 && "Target didn't implement insertNoop!");
- abort();
+ LLVM_UNREACHABLE("Target didn't implement insertNoop!");
}
/// isPredicated - Returns true if the instruction is already predicated.
Modified: llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp Sat Jul 11 15:10:48 2009
@@ -18,6 +18,7 @@
#include "llvm/Assembly/Writer.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Streams.h"
using namespace llvm;
@@ -131,7 +132,7 @@
const char *AliasString;
switch (R) {
- default: assert(0 && "Unknown alias type!");
+ default: LLVM_UNREACHABLE("Unknown alias type!");
case NoAlias: No++; AliasString = "No alias"; break;
case MayAlias: May++; AliasString = "May alias"; break;
case MustAlias: Must++; AliasString = "Must alias"; break;
@@ -156,7 +157,7 @@
const char *MRString;
switch (R) {
- default: assert(0 && "Unknown mod/ref type!");
+ default: LLVM_UNREACHABLE("Unknown mod/ref type!");
case NoModRef: NoMR++; MRString = "NoModRef"; break;
case Ref: JustRef++; MRString = "JustRef"; break;
case Mod: JustMod++; MRString = "JustMod"; break;
Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Sat Jul 11 15:10:48 2009
@@ -20,6 +20,7 @@
#include "llvm/Target/TargetData.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/InstIterator.h"
#include "llvm/Support/Streams.h"
using namespace llvm;
@@ -539,7 +540,7 @@
case Refs : OS << "Ref "; break;
case Mods : OS << "Mod "; break;
case ModRef : OS << "Mod/Ref "; break;
- default: assert(0 && "Bad value for AccessTy!");
+ default: LLVM_UNREACHABLE("Bad value for AccessTy!");
}
if (isVolatile()) OS << "[volatile] ";
if (Forward)
Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Sat Jul 11 15:10:48 2009
@@ -28,6 +28,7 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include <algorithm>
using namespace llvm;
@@ -157,7 +158,7 @@
virtual void getArgumentAccesses(Function *F, CallSite CS,
std::vector<PointerAccessInfo> &Info) {
- assert(0 && "This method may not be called on this function!");
+ LLVM_UNREACHABLE("This method may not be called on this function!");
}
virtual void getMustAliases(Value *P, std::vector<Value*> &RetVals) { }
Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ConstantFolding.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ConstantFolding.cpp (original)
+++ llvm/trunk/lib/Analysis/ConstantFolding.cpp Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/MathExtras.h"
#include <cerrno>
@@ -365,7 +366,7 @@
return 0;
case Instruction::ICmp:
case Instruction::FCmp:
- assert(0 &&"This function is invalid for compares: no predicate specified");
+ LLVM_UNREACHABLE("This function is invalid for compares: no predicate specified");
case Instruction::PtrToInt:
// If the input is a inttoptr, eliminate the pair. This requires knowing
// the width of a pointer, so it can't be done in ConstantExpr::getCast.
@@ -690,7 +691,7 @@
return Context->getConstantFP(APFloat((float)V));
if (Ty == Type::DoubleTy)
return Context->getConstantFP(APFloat(V));
- assert(0 && "Can only constant fold float/double");
+ LLVM_UNREACHABLE("Can only constant fold float/double");
return 0; // dummy return to suppress warning
}
@@ -709,7 +710,7 @@
return Context->getConstantFP(APFloat((float)V));
if (Ty == Type::DoubleTy)
return Context->getConstantFP(APFloat(V));
- assert(0 && "Can only constant fold float/double");
+ LLVM_UNREACHABLE("Can only constant fold float/double");
return 0; // dummy return to suppress warning
}
Modified: llvm/trunk/lib/Analysis/IPA/Andersens.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/Andersens.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/IPA/Andersens.cpp (original)
+++ llvm/trunk/lib/Analysis/IPA/Andersens.cpp Sat Jul 11 15:10:48 2009
@@ -508,7 +508,7 @@
#ifndef NDEBUG
V->dump();
#endif
- assert(0 && "Value does not have a node in the points-to graph!");
+ LLVM_UNREACHABLE("Value does not have a node in the points-to graph!");
}
return I->second;
}
@@ -827,10 +827,10 @@
return getNodeForConstantPointer(CE->getOperand(0));
default:
cerr << "Constant Expr not yet handled: " << *CE << "\n";
- assert(0);
+ llvm_unreachable();
}
} else {
- assert(0 && "Unknown constant pointer!");
+ LLVM_UNREACHABLE("Unknown constant pointer!");
}
return 0;
}
@@ -854,10 +854,10 @@
return getNodeForConstantPointerTarget(CE->getOperand(0));
default:
cerr << "Constant Expr not yet handled: " << *CE << "\n";
- assert(0);
+ llvm_unreachable();
}
} else {
- assert(0 && "Unknown constant pointer!");
+ LLVM_UNREACHABLE("Unknown constant pointer!");
}
return 0;
}
@@ -1244,7 +1244,7 @@
}
void Andersens::visitVAArg(VAArgInst &I) {
- assert(0 && "vaarg not handled yet!");
+ LLVM_UNREACHABLE("vaarg not handled yet!");
}
/// AddConstraintsForCall - Add constraints for a call with actual arguments
Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Sat Jul 11 15:10:48 2009
@@ -24,6 +24,7 @@
#include "llvm/Analysis/ScalarEvolution.h"
#include "llvm/Instructions.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetData.h"
using namespace llvm;
@@ -63,7 +64,7 @@
return i->getPointerOperand();
if (StoreInst *i = dyn_cast<StoreInst>(I))
return i->getPointerOperand();
- assert(0 && "Value is no load or store instruction!");
+ LLVM_UNREACHABLE("Value is no load or store instruction!");
// Never reached.
return 0;
}
Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Sat Jul 11 15:10:48 2009
@@ -75,6 +75,7 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ConstantRange.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/InstIterator.h"
#include "llvm/Support/MathExtras.h"
@@ -147,21 +148,21 @@
SCEV(scCouldNotCompute) {}
void SCEVCouldNotCompute::Profile(FoldingSetNodeID &ID) const {
- assert(0 && "Attempt to use a SCEVCouldNotCompute object!");
+ LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
}
bool SCEVCouldNotCompute::isLoopInvariant(const Loop *L) const {
- assert(0 && "Attempt to use a SCEVCouldNotCompute object!");
+ LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
return false;
}
const Type *SCEVCouldNotCompute::getType() const {
- assert(0 && "Attempt to use a SCEVCouldNotCompute object!");
+ LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
return 0;
}
bool SCEVCouldNotCompute::hasComputableLoopEvolution(const Loop *L) const {
- assert(0 && "Attempt to use a SCEVCouldNotCompute object!");
+ LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
return false;
}
@@ -296,7 +297,7 @@
else if (isa<SCEVUMaxExpr>(this))
return SE.getUMaxExpr(NewOps);
else
- assert(0 && "Unknown commutative expr!");
+ LLVM_UNREACHABLE("Unknown commutative expr!");
}
}
return this;
@@ -543,7 +544,7 @@
return operator()(LC->getOperand(), RC->getOperand());
}
- assert(0 && "Unknown SCEV kind!");
+ LLVM_UNREACHABLE("Unknown SCEV kind!");
return false;
}
};
@@ -3488,7 +3489,7 @@
if (Idx >= ATy->getNumElements()) return 0; // Bogus program
Init = Constant::getNullValue(ATy->getElementType());
} else {
- assert(0 && "Unknown constant aggregate type!");
+ LLVM_UNREACHABLE("Unknown constant aggregate type!");
}
return 0;
} else {
@@ -3898,7 +3899,7 @@
return getSMaxExpr(NewOps);
if (isa<SCEVUMaxExpr>(Comm))
return getUMaxExpr(NewOps);
- assert(0 && "Unknown commutative SCEV type!");
+ LLVM_UNREACHABLE("Unknown commutative SCEV type!");
}
}
// If we got here, all operands are loop invariant.
@@ -3949,7 +3950,7 @@
return getTruncateExpr(Op, Cast->getType());
}
- assert(0 && "Unknown SCEV type!");
+ LLVM_UNREACHABLE("Unknown SCEV type!");
return 0;
}
@@ -4260,7 +4261,7 @@
switch (Pred) {
default:
- assert(0 && "Unexpected ICmpInst::Predicate value!");
+ LLVM_UNREACHABLE("Unexpected ICmpInst::Predicate value!");
break;
case ICmpInst::ICMP_SGT:
Pred = ICmpInst::ICMP_SLT;
Modified: llvm/trunk/lib/AsmParser/LLLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLLexer.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/AsmParser/LLLexer.cpp (original)
+++ llvm/trunk/lib/AsmParser/LLLexer.cpp Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
#include "llvm/DerivedTypes.h"
#include "llvm/Instruction.h"
#include "llvm/LLVMContext.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/SourceMgr.h"
@@ -699,7 +700,7 @@
uint64_t Pair[2];
switch (Kind) {
- default: assert(0 && "Unknown kind!");
+ default: LLVM_UNREACHABLE("Unknown kind!");
case 'K':
// F80HexFPConstant - x87 long double in hexadecimal format (10 bytes)
FP80HexToIntPair(TokStart+3, CurPtr, Pair);
Modified: llvm/trunk/lib/AsmParser/LLParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/AsmParser/LLParser.cpp (original)
+++ llvm/trunk/lib/AsmParser/LLParser.cpp Sat Jul 11 15:10:48 2009
@@ -24,6 +24,7 @@
#include "llvm/ValueSymbolTable.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/StringExtras.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@@ -2040,7 +2041,7 @@
return Error(ID.Loc, "functions are not values, refer to them as pointers");
switch (ID.Kind) {
- default: assert(0 && "Unknown ValID!");
+ default: LLVM_UNREACHABLE("Unknown ValID!");
case ValID::t_LocalID:
case ValID::t_LocalName:
return Error(ID.Loc, "invalid use of function-local name");
@@ -2835,7 +2836,7 @@
bool Valid;
switch (OperandType) {
- default: assert(0 && "Unknown operand type!");
+ default: LLVM_UNREACHABLE("Unknown operand type!");
case 0: // int or FP.
Valid = LHS->getType()->isIntOrIntVector() ||
LHS->getType()->isFPOrFPVector();
Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)
+++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/Module.h"
#include "llvm/TypeSymbolTable.h"
#include "llvm/ValueSymbolTable.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Streams.h"
#include "llvm/Support/raw_ostream.h"
@@ -58,7 +59,7 @@
static unsigned GetEncodedCastOpcode(unsigned Opcode) {
switch (Opcode) {
- default: assert(0 && "Unknown cast instruction!");
+ default: LLVM_UNREACHABLE("Unknown cast instruction!");
case Instruction::Trunc : return bitc::CAST_TRUNC;
case Instruction::ZExt : return bitc::CAST_ZEXT;
case Instruction::SExt : return bitc::CAST_SEXT;
@@ -76,7 +77,7 @@
static unsigned GetEncodedBinaryOpcode(unsigned Opcode) {
switch (Opcode) {
- default: assert(0 && "Unknown binary instruction!");
+ default: LLVM_UNREACHABLE("Unknown binary instruction!");
case Instruction::Add:
case Instruction::FAdd: return bitc::BINOP_ADD;
case Instruction::Sub:
@@ -200,7 +201,7 @@
unsigned Code = 0;
switch (T->getTypeID()) {
- default: assert(0 && "Unknown type!");
+ default: LLVM_UNREACHABLE("Unknown type!");
case Type::VoidTyID: Code = bitc::TYPE_CODE_VOID; break;
case Type::FloatTyID: Code = bitc::TYPE_CODE_FLOAT; break;
case Type::DoubleTyID: Code = bitc::TYPE_CODE_DOUBLE; break;
@@ -278,7 +279,7 @@
static unsigned getEncodedLinkage(const GlobalValue *GV) {
switch (GV->getLinkage()) {
- default: assert(0 && "Invalid linkage!");
+ default: LLVM_UNREACHABLE("Invalid linkage!");
case GlobalValue::GhostLinkage: // Map ghost linkage onto external.
case GlobalValue::ExternalLinkage: return 0;
case GlobalValue::WeakAnyLinkage: return 1;
@@ -298,7 +299,7 @@
static unsigned getEncodedVisibility(const GlobalValue *GV) {
switch (GV->getVisibility()) {
- default: assert(0 && "Invalid visibility!");
+ default: LLVM_UNREACHABLE("Invalid visibility!");
case GlobalValue::DefaultVisibility: return 0;
case GlobalValue::HiddenVisibility: return 1;
case GlobalValue::ProtectedVisibility: return 2;
@@ -712,7 +713,7 @@
}
}
} else {
- assert(0 && "Unknown constant!");
+ LLVM_UNREACHABLE("Unknown constant!");
}
Stream.EmitRecord(Code, Record, AbbrevToUse);
Record.clear();
@@ -1126,7 +1127,7 @@
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8));
if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
Abbv) != VST_ENTRY_8_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // 7-bit fixed width VST_ENTRY strings.
@@ -1137,7 +1138,7 @@
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 7));
if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
Abbv) != VST_ENTRY_7_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // 6-bit char6 VST_ENTRY strings.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1147,7 +1148,7 @@
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6));
if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
Abbv) != VST_ENTRY_6_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // 6-bit char6 VST_BBENTRY strings.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1157,7 +1158,7 @@
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6));
if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
Abbv) != VST_BBENTRY_6_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
@@ -1169,7 +1170,7 @@
Log2_32_Ceil(VE.getTypes().size()+1)));
if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
Abbv) != CONSTANTS_SETTYPE_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INTEGER abbrev for CONSTANTS_BLOCK.
@@ -1178,7 +1179,7 @@
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 8));
if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
Abbv) != CONSTANTS_INTEGER_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // CE_CAST abbrev for CONSTANTS_BLOCK.
@@ -1191,14 +1192,14 @@
if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
Abbv) != CONSTANTS_CE_CAST_Abbrev)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // NULL abbrev for CONSTANTS_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_NULL));
if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
Abbv) != CONSTANTS_NULL_Abbrev)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
// FIXME: This should only use space for first class types!
@@ -1211,7 +1212,7 @@
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 1)); // volatile
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_LOAD_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_BINOP abbrev for FUNCTION_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1221,7 +1222,7 @@
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 4)); // opc
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_BINOP_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_CAST abbrev for FUNCTION_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1232,7 +1233,7 @@
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 4)); // opc
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_CAST_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_RET abbrev for FUNCTION_BLOCK.
@@ -1240,7 +1241,7 @@
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_RET));
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_RET_VOID_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_RET abbrev for FUNCTION_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1248,14 +1249,14 @@
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // ValID
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_RET_VAL_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_UNREACHABLE abbrev for FUNCTION_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_UNREACHABLE));
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_UNREACHABLE_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
Stream.ExitBlock();
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -237,7 +237,7 @@
else if (I->hasWeakLinkage())
O << TAI->getWeakRefDirective() << Name << '\n';
else if (!I->hasLocalLinkage())
- assert(0 && "Invalid alias linkage");
+ LLVM_UNREACHABLE("Invalid alias linkage");
printVisibility(Name, I->getVisibility());
@@ -901,7 +901,7 @@
case Instruction::SIToFP:
case Instruction::FPToUI:
case Instruction::FPToSI:
- assert(0 && "FIXME: Don't yet support this kind of constant cast expr");
+ LLVM_UNREACHABLE("FIXME: Don't yet support this kind of constant cast expr");
break;
case Instruction::BitCast:
return EmitConstantValueOnly(CE->getOperand(0));
@@ -967,10 +967,10 @@
O << ')';
break;
default:
- assert(0 && "Unsupported operator!");
+ LLVM_UNREACHABLE("Unsupported operator!");
}
} else {
- assert(0 && "Unknown constant value!");
+ LLVM_UNREACHABLE("Unknown constant value!");
}
}
@@ -1209,7 +1209,7 @@
O << '\n';
}
return;
- } else assert(0 && "Floating point constant type not handled");
+ } else LLVM_UNREACHABLE("Floating point constant type not handled");
}
void AsmPrinter::EmitGlobalConstantLargeInt(const ConstantInt *CI,
@@ -1660,7 +1660,7 @@
"Target cannot handle 64-bit constant exprs!");
O << TAI->getData64bitsDirective(AddrSpace);
} else {
- assert(0 && "Target cannot handle given data directive width!");
+ LLVM_UNREACHABLE("Target cannot handle given data directive width!");
}
break;
}
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DIE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DIE.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DIE.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DIE.cpp Sat Jul 11 15:10:48 2009
@@ -16,6 +16,7 @@
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Support/ErrorHandling.h"
#include <ostream>
using namespace llvm;
@@ -206,7 +207,7 @@
case dwarf::DW_FORM_data8: Asm->EmitInt64(Integer); break;
case dwarf::DW_FORM_udata: Asm->EmitULEB128Bytes(Integer); break;
case dwarf::DW_FORM_sdata: Asm->EmitSLEB128Bytes(Integer); break;
- default: assert(0 && "DIE Value form not supported yet"); break;
+ default: LLVM_UNREACHABLE("DIE Value form not supported yet");
}
}
@@ -225,7 +226,7 @@
case dwarf::DW_FORM_data8: return sizeof(int64_t);
case dwarf::DW_FORM_udata: return TargetAsmInfo::getULEB128Size(Integer);
case dwarf::DW_FORM_sdata: return TargetAsmInfo::getSLEB128Size(Integer);
- default: assert(0 && "DIE Value form not supported yet"); break;
+ default: LLVM_UNREACHABLE("DIE Value form not supported yet"); break;
}
return 0;
}
@@ -481,7 +482,7 @@
case dwarf::DW_FORM_block2: Asm->EmitInt16(Size); break;
case dwarf::DW_FORM_block4: Asm->EmitInt32(Size); break;
case dwarf::DW_FORM_block: Asm->EmitULEB128Bytes(Size); break;
- default: assert(0 && "Improper form for block"); break;
+ default: LLVM_UNREACHABLE("Improper form for block"); break;
}
const SmallVector<DIEAbbrevData, 8> &AbbrevData = Abbrev.getData();
@@ -499,7 +500,7 @@
case dwarf::DW_FORM_block2: return Size + sizeof(int16_t);
case dwarf::DW_FORM_block4: return Size + sizeof(int32_t);
case dwarf::DW_FORM_block: return Size + TargetAsmInfo::getULEB128Size(Size);
- default: assert(0 && "Improper form for block"); break;
+ default: LLVM_UNREACHABLE("Improper form for block"); break;
}
return 0;
}
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -17,6 +17,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameInfo.h"
@@ -190,7 +191,7 @@
Asm->EmitULEB128Bytes(Offset);
Asm->EOL("Offset");
} else {
- assert(0 && "Machine move not supported yet.");
+ LLVM_UNREACHABLE("Machine move not supported yet.");
}
} else if (Src.isReg() &&
Src.getReg() == MachineLocation::VirtualFP) {
@@ -200,7 +201,7 @@
Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), isEH));
Asm->EOL("Register");
} else {
- assert(0 && "Machine move not supported yet.");
+ LLVM_UNREACHABLE("Machine move not supported yet.");
}
} else {
unsigned Reg = RI->getDwarfRegNum(Src.getReg(), isEH);
Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Sat Jul 11 15:10:48 2009
@@ -27,6 +27,7 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
@@ -461,7 +462,7 @@
// _GLIBCXX_DEBUG checks strict weak ordering, which involves comparing
// an object with itself.
#ifndef _GLIBCXX_DEBUG
- assert(0 && "Predecessor appears twice");
+ LLVM_UNREACHABLE("Predecessor appears twice");
#endif
return false;
}
Modified: llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp (original)
+++ llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
//===----------------------------------------------------------------------===//
// ELFCodeEmitter Implementation
@@ -107,7 +108,7 @@
MR.setResultPointer((void*)Addr);
MR.setConstantVal(JumpTableSectionIdx);
} else {
- assert(0 && "Unhandled relocation type");
+ LLVM_UNREACHABLE("Unhandled relocation type");
}
ES->addRelocation(MR);
}
Modified: llvm/trunk/lib/CodeGen/ELFWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ELFWriter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ELFWriter.cpp (original)
+++ llvm/trunk/lib/CodeGen/ELFWriter.cpp Sat Jul 11 15:10:48 2009
@@ -51,6 +51,7 @@
#include "llvm/Support/Streams.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
@@ -147,7 +148,7 @@
unsigned ELFWriter::getGlobalELFVisibility(const GlobalValue *GV) {
switch (GV->getVisibility()) {
default:
- assert(0 && "unknown visibility type");
+ LLVM_UNREACHABLE("unknown visibility type");
case GlobalValue::DefaultVisibility:
return ELFSym::STV_DEFAULT;
case GlobalValue::HiddenVisibility:
@@ -339,9 +340,9 @@
else if (CFP->getType() == Type::FloatTy)
GblS.emitWord32(Val);
else if (CFP->getType() == Type::X86_FP80Ty) {
- assert(0 && "X86_FP80Ty global emission not implemented");
+ LLVM_UNREACHABLE("X86_FP80Ty global emission not implemented");
} else if (CFP->getType() == Type::PPC_FP128Ty)
- assert(0 && "PPC_FP128Ty global emission not implemented");
+ LLVM_UNREACHABLE("PPC_FP128Ty global emission not implemented");
return;
} else if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) {
if (Size == 4)
@@ -349,7 +350,7 @@
else if (Size == 8)
GblS.emitWord64(CI->getZExtValue());
else
- assert(0 && "LargeInt global emission not implemented");
+ LLVM_UNREACHABLE("LargeInt global emission not implemented");
return;
} else if (const ConstantVector *CP = dyn_cast<ConstantVector>(CV)) {
const VectorType *PTy = CP->getType();
@@ -357,7 +358,7 @@
EmitGlobalConstant(CP->getOperand(I), GblS);
return;
}
- assert(0 && "unknown global constant");
+ LLVM_UNREACHABLE("unknown global constant");
}
Modified: llvm/trunk/lib/CodeGen/GCMetadata.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GCMetadata.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GCMetadata.cpp (original)
+++ llvm/trunk/lib/CodeGen/GCMetadata.cpp Sat Jul 11 15:10:48 2009
@@ -144,7 +144,7 @@
static const char *DescKind(GC::PointKind Kind) {
switch (Kind) {
- default: assert(0 && "Unknown GC point kind");
+ default: LLVM_UNREACHABLE("Unknown GC point kind");
case GC::Loop: return "loop";
case GC::Return: return "return";
case GC::PreCall: return "pre-call";
Modified: llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp Sat Jul 11 15:10:48 2009
@@ -157,7 +157,7 @@
IRBuilder<> Builder(IP->getParent(), IP);
switch(BitSize) {
- default: assert(0 && "Unhandled type size of value to byteswap!");
+ default: LLVM_UNREACHABLE("Unhandled type size of value to byteswap!");
case 16: {
Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8),
"bswap.2");
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Sat Jul 11 15:10:48 2009
@@ -1102,7 +1102,7 @@
unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
if (tii_->isMoveInstr(*VNI->copy, SrcReg, DstReg, SrcSubReg, DstSubReg))
return SrcReg;
- assert(0 && "Unrecognized copy instruction!");
+ LLVM_UNREACHABLE("Unrecognized copy instruction!");
return 0;
}
Modified: llvm/trunk/lib/CodeGen/MachOCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachOCodeEmitter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachOCodeEmitter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachOCodeEmitter.cpp Sat Jul 11 15:10:48 2009
@@ -19,6 +19,7 @@
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/OutputBuffer.h"
#include <vector>
@@ -104,7 +105,7 @@
// FIXME: This should be a set or something that uniques
MOW.PendingGlobals.push_back(MR.getGlobalValue());
} else {
- assert(0 && "Unhandled relocation type");
+ LLVM_UNREACHABLE("Unhandled relocation type");
}
MOS->addRelocation(MR);
}
Modified: llvm/trunk/lib/CodeGen/MachOWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachOWriter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachOWriter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachOWriter.cpp Sat Jul 11 15:10:48 2009
@@ -669,7 +669,7 @@
ptr[6] = val >> 48;
ptr[7] = val >> 56;
} else {
- assert(0 && "Not implemented: bit widths > 64");
+ LLVM_UNREACHABLE("Not implemented: bit widths > 64");
}
break;
}
@@ -733,7 +733,7 @@
PA+SL->getElementOffset(i)));
} else {
cerr << "Bad Type: " << *PC->getType() << "\n";
- assert(0 && "Unknown constant type to initialize memory with!");
+ LLVM_UNREACHABLE("Unknown constant type to initialize memory with!");
}
}
}
@@ -749,7 +749,7 @@
switch (GV->getLinkage()) {
default:
- assert(0 && "Unexpected linkage type!");
+ LLVM_UNREACHABLE("Unexpected linkage type!");
break;
case GlobalValue::WeakAnyLinkage:
case GlobalValue::WeakODRLinkage:
Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/Target/TargetInstrDesc.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Analysis/DebugInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/LeakDetector.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Streams.h"
@@ -156,7 +157,7 @@
return false;
switch (getType()) {
- default: assert(0 && "Unrecognized operand type");
+ default: LLVM_UNREACHABLE("Unrecognized operand type");
case MachineOperand::MO_Register:
return getReg() == Other.getReg() && isDef() == Other.isDef() &&
getSubReg() == Other.getSubReg();
@@ -274,7 +275,7 @@
OS << '>';
break;
default:
- assert(0 && "Unrecognized operand type");
+ LLVM_UNREACHABLE("Unrecognized operand type");
}
if (unsigned TF = getTargetFlags())
Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/Instructions.h"
#include "llvm/Module.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Streams.h"
using namespace llvm;
using namespace llvm::dwarf;
@@ -290,7 +291,7 @@
}
// This should never happen
- assert(0 && "Personality function should be set!");
+ LLVM_UNREACHABLE("Personality function should be set!");
return 0;
}
Modified: llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp (original)
+++ llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp Sat Jul 11 15:10:48 2009
@@ -34,6 +34,7 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/Statistic.h"
#include <map>
using namespace llvm;
@@ -793,7 +794,7 @@
cerr << "*** Scheduling failed! ***\n";
SuccSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
Modified: llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp (original)
+++ llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/raw_ostream.h"
#include <map>
@@ -83,7 +84,7 @@
this == getConstantPool() ||
this == getJumpTable())
return true;
- assert(0 && "Unknown PseudoSourceValue!");
+ LLVM_UNREACHABLE("Unknown PseudoSourceValue!");
return false;
}
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Jul 11 15:10:48 2009
@@ -393,7 +393,7 @@
assert(Depth <= 6 && "GetNegatedExpression doesn't match isNegatibleForFree");
switch (Op.getOpcode()) {
- default: assert(0 && "Unknown code");
+ default: LLVM_UNREACHABLE("Unknown code");
case ISD::ConstantFP: {
APFloat V = cast<ConstantFPSDNode>(Op)->getValueAPF();
V.changeSign();
@@ -5063,7 +5063,7 @@
if (Value.getOpcode() != ISD::TargetConstantFP) {
SDValue Tmp;
switch (CFP->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unknown FP type");
+ default: LLVM_UNREACHABLE("Unknown FP type");
case MVT::f80: // We don't do this for these yet.
case MVT::f128:
case MVT::ppcf128:
@@ -6107,7 +6107,7 @@
SrcValue = ST->getSrcValue();
SrcValueOffset = ST->getSrcValueOffset();
} else {
- assert(0 && "FindAliasInfo expected a memory operand");
+ LLVM_UNREACHABLE("FindAliasInfo expected a memory operand");
}
return false;
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Jul 11 15:10:48 2009
@@ -983,7 +983,7 @@
return Tmp2;
case ISD::BUILD_VECTOR:
switch (TLI.getOperationAction(ISD::BUILD_VECTOR, Node->getValueType(0))) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Custom:
Tmp3 = TLI.LowerOperation(Result, DAG);
if (Tmp3.getNode()) {
@@ -1100,7 +1100,7 @@
Tmp4 = Result.getValue(1);
switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Legal:
// If this is an unaligned load and the target doesn't support it,
// expand it.
@@ -1270,7 +1270,7 @@
Tmp2 = LegalizeOp(Ch);
} else {
switch (TLI.getLoadExtAction(ExtType, SrcVT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Custom:
isCustom = true;
// FALLTHROUGH
@@ -1363,7 +1363,7 @@
MVT VT = Tmp3.getValueType();
switch (TLI.getOperationAction(ISD::STORE, VT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Legal:
// If this is an unaligned store and the target doesn't support it,
// expand it.
@@ -1463,7 +1463,7 @@
ST->getOffset());
switch (TLI.getTruncStoreAction(ST->getValue().getValueType(), StVT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Legal:
// If this is an unaligned store and the target doesn't support it,
// expand it.
@@ -1691,7 +1691,7 @@
MVT OpVT = LHS.getValueType();
ISD::CondCode CCCode = cast<CondCodeSDNode>(CC)->get();
switch (TLI.getCondCodeAction(CCCode, OpVT)) {
- default: assert(0 && "Unknown condition code action!");
+ default: LLVM_UNREACHABLE("Unknown condition code action!");
case TargetLowering::Legal:
// Nothing to do.
break;
@@ -1926,7 +1926,7 @@
RTLIB::Libcall Call_PPCF128) {
RTLIB::Libcall LC;
switch (Node->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unexpected request for libcall!");
+ default: LLVM_UNREACHABLE("Unexpected request for libcall!");
case MVT::f32: LC = Call_F32; break;
case MVT::f64: LC = Call_F64; break;
case MVT::f80: LC = Call_F80; break;
@@ -1942,7 +1942,7 @@
RTLIB::Libcall Call_I128) {
RTLIB::Libcall LC;
switch (Node->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unexpected request for libcall!");
+ default: LLVM_UNREACHABLE("Unexpected request for libcall!");
case MVT::i16: LC = Call_I16; break;
case MVT::i32: LC = Call_I32; break;
case MVT::i64: LC = Call_I64; break;
@@ -2028,7 +2028,7 @@
// offset depending on the data type.
uint64_t FF;
switch (Op0.getValueType().getSimpleVT()) {
- default: assert(0 && "Unsupported integer type!");
+ default: LLVM_UNREACHABLE("Unsupported integer type!");
case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
@@ -2192,7 +2192,7 @@
SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op,
DebugLoc dl) {
switch (Opc) {
- default: assert(0 && "Cannot expand this yet!");
+ default: LLVM_UNREACHABLE("Cannot expand this yet!");
case ISD::CTPOP: {
static const uint64_t mask[6] = {
0x5555555555555555ULL, 0x3333333333333333ULL,
@@ -2306,7 +2306,7 @@
else if (VT.isFloatingPoint())
Results.push_back(DAG.getConstantFP(0, VT));
else
- assert(0 && "Unknown value type!");
+ LLVM_UNREACHABLE("Unknown value type!");
break;
}
case ISD::TRAP: {
@@ -2810,7 +2810,7 @@
// type in some cases cases.
// Also, we can fall back to a division in some cases, but that's a big
// performance hit in the general case.
- assert(0 && "Don't know how to expand this operation yet!");
+ LLVM_UNREACHABLE("Don't know how to expand this operation yet!");
}
if (isSigned) {
Tmp1 = DAG.getConstant(VT.getSizeInBits() - 1, TLI.getShiftAmountTy());
@@ -3091,7 +3091,7 @@
break;
}
if (NewInTy.isInteger())
- assert(0 && "Cannot promote Legal Integer SETCC yet");
+ LLVM_UNREACHABLE("Cannot promote Legal Integer SETCC yet");
else {
Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NewInTy, Tmp1);
Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NewInTy, Tmp2);
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Sat Jul 11 15:10:48 2009
@@ -491,7 +491,7 @@
SDValue Res;
switch (getTypeAction(N->getOperand(0).getValueType())) {
- default: assert(0 && "Unknown type action!");
+ default: LLVM_UNREACHABLE("Unknown type action!");
case Legal:
case ExpandInteger:
Res = N->getOperand(0);
@@ -666,7 +666,7 @@
// insert sign extends for ALL conditions, but zero extend is cheaper on
// many machines (an AND instead of two shifts), so prefer it.
switch (CCCode) {
- default: assert(0 && "Unknown integer comparison!");
+ default: LLVM_UNREACHABLE("Unknown integer comparison!");
case ISD::SETEQ:
case ISD::SETNE:
case ISD::SETUGE:
@@ -1104,7 +1104,7 @@
DAG.getConstant(~HighBitMask, ShTy));
switch (N->getOpcode()) {
- default: assert(0 && "Unknown shift");
+ default: LLVM_UNREACHABLE("Unknown shift");
case ISD::SHL:
Lo = DAG.getConstant(0, NVT); // Low part is zero.
Hi = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); // High part from Lo part.
@@ -1132,7 +1132,7 @@
Amt);
unsigned Op1, Op2;
switch (N->getOpcode()) {
- default: assert(0 && "Unknown shift");
+ default: LLVM_UNREACHABLE("Unknown shift");
case ISD::SHL: Op1 = ISD::SHL; Op2 = ISD::SRL; break;
case ISD::SRL:
case ISD::SRA: Op1 = ISD::SRL; Op2 = ISD::SHL; break;
@@ -1172,7 +1172,7 @@
SDValue Lo1, Hi1, Lo2, Hi2;
switch (N->getOpcode()) {
- default: assert(0 && "Unknown shift");
+ default: LLVM_UNREACHABLE("Unknown shift");
case ISD::SHL:
// ShAmt < NVTBits
Lo1 = DAG.getConstant(0, NVT); // Low part is zero.
@@ -1792,7 +1792,7 @@
}
if (!ExpandShiftWithUnknownAmountBit(N, Lo, Hi))
- assert(0 && "Unsupported shift!");
+ LLVM_UNREACHABLE("Unsupported shift!");
}
void DAGTypeLegalizer::ExpandIntRes_SIGN_EXTEND(SDNode *N,
@@ -2050,7 +2050,7 @@
// FIXME: This generated code sucks.
ISD::CondCode LowCC;
switch (CCCode) {
- default: assert(0 && "Unknown integer setcc!");
+ default: LLVM_UNREACHABLE("Unknown integer setcc!");
case ISD::SETLT:
case ISD::SETULT: LowCC = ISD::SETULT; break;
case ISD::SETGT:
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Sat Jul 11 15:10:48 2009
@@ -278,7 +278,7 @@
cerr << "ScalarizeVectorOperand Op #" << OpNo << ": ";
N->dump(&DAG); cerr << "\n";
#endif
- assert(0 && "Do not know how to scalarize this operator's operand!");
+ LLVM_UNREACHABLE("Do not know how to scalarize this operator's operand!");
case ISD::BIT_CONVERT:
Res = ScalarizeVecOp_BIT_CONVERT(N);
break;
@@ -576,7 +576,7 @@
SDValue VLo, VHi;
MVT InVT = N->getOperand(0).getValueType();
switch (getTypeAction(InVT)) {
- default: assert(0 && "Unexpected type action!");
+ default: LLVM_UNREACHABLE("Unexpected type action!");
case Legal: {
MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
LoVT.getVectorNumElements());
@@ -768,7 +768,7 @@
// Split the input.
MVT InVT = N->getOperand(0).getValueType();
switch (getTypeAction(InVT)) {
- default: assert(0 && "Unexpected type action!");
+ default: LLVM_UNREACHABLE("Unexpected type action!");
case Legal: {
MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
LoVT.getVectorNumElements());
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp Sat Jul 11 15:10:48 2009
@@ -140,7 +140,7 @@
cerr << "*** Scheduling failed! ***\n";
PredSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Sat Jul 11 15:10:48 2009
@@ -29,6 +29,7 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/PriorityQueue.h"
#include "llvm/ADT/Statistic.h"
#include <climits>
@@ -113,7 +114,7 @@
cerr << "*** Scheduling failed! ***\n";
SuccSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Sat Jul 11 15:10:48 2009
@@ -25,6 +25,7 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/PriorityQueue.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
@@ -202,7 +203,7 @@
cerr << "*** Scheduling failed! ***\n";
PredSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
@@ -829,7 +830,7 @@
cerr << "*** Scheduling failed! ***\n";
SuccSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp Sat Jul 11 15:10:48 2009
@@ -25,6 +25,7 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
using namespace llvm;
@@ -430,7 +431,7 @@
MI->addOperand(MachineOperand::CreateImm(SubIdx));
BB->insert(InsertPos, MI);
} else
- assert(0 && "Node is not insert_subreg, extract_subreg, or subreg_to_reg");
+ LLVM_UNREACHABLE("Node is not insert_subreg, extract_subreg, or subreg_to_reg");
SDValue Op(Node, 0);
bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
@@ -551,10 +552,10 @@
#ifndef NDEBUG
Node->dump(DAG);
#endif
- assert(0 && "This target-independent node should have been selected!");
+ LLVM_UNREACHABLE("This target-independent node should have been selected!");
break;
case ISD::EntryToken:
- assert(0 && "EntryToken should have been excluded from the schedule!");
+ LLVM_UNREACHABLE("EntryToken should have been excluded from the schedule!");
break;
case ISD::TokenFactor: // fall thru
break;
@@ -618,7 +619,7 @@
++i; // Skip the ID value.
switch (Flags & 7) {
- default: assert(0 && "Bad flags!");
+ default: LLVM_UNREACHABLE("Bad flags!");
case 2: // Def of register.
for (; NumVals; --NumVals, ++i) {
unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sat Jul 11 15:10:48 2009
@@ -31,6 +31,7 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
@@ -53,7 +54,7 @@
static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
switch (VT.getSimpleVT()) {
- default: assert(0 && "Unknown FP format");
+ default: LLVM_UNREACHABLE("Unknown FP format");
case MVT::f32: return &APFloat::IEEEsingle;
case MVT::f64: return &APFloat::IEEEdouble;
case MVT::f80: return &APFloat::x87DoubleExtended;
@@ -243,7 +244,7 @@
/// if the operation does not depend on the sign of the input (setne and seteq).
static int isSignedOp(ISD::CondCode Opcode) {
switch (Opcode) {
- default: assert(0 && "Illegal integer setcc operation!");
+ default: LLVM_UNREACHABLE("Illegal integer setcc operation!");
case ISD::SETEQ:
case ISD::SETNE: return 0;
case ISD::SETLT:
@@ -363,7 +364,7 @@
switch (N->getOpcode()) {
case ISD::TargetExternalSymbol:
case ISD::ExternalSymbol:
- assert(0 && "Should only be used on nodes with operands");
+ LLVM_UNREACHABLE("Should only be used on nodes with operands");
default: break; // Normal nodes don't need extra info.
case ISD::ARG_FLAGS:
ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
@@ -626,7 +627,7 @@
bool Erased = false;
switch (N->getOpcode()) {
case ISD::EntryToken:
- assert(0 && "EntryToken should not be in CSEMaps!");
+ LLVM_UNREACHABLE("EntryToken should not be in CSEMaps!");
return false;
case ISD::HANDLENODE: return false; // noop.
case ISD::CONDCODE:
@@ -668,7 +669,7 @@
!N->isMachineOpcode() && !doNotCSE(N)) {
N->dump(this);
cerr << "\n";
- assert(0 && "Node is not in map!");
+ LLVM_UNREACHABLE("Node is not in map!");
}
#endif
return Erased;
@@ -1442,7 +1443,7 @@
const APInt &C1 = N1C->getAPIntValue();
switch (Cond) {
- default: assert(0 && "Unknown integer setcc!");
+ default: LLVM_UNREACHABLE("Unknown integer setcc!");
case ISD::SETEQ: return getConstant(C1 == C2, VT);
case ISD::SETNE: return getConstant(C1 != C2, VT);
case ISD::SETULT: return getConstant(C1.ult(C2), VT);
@@ -2371,7 +2372,7 @@
case ISD::MERGE_VALUES:
case ISD::CONCAT_VECTORS:
return Operand; // Factor, merge or concat of one node? No need.
- case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
+ case ISD::FP_ROUND: LLVM_UNREACHABLE("Invalid method to make FP_ROUND node");
case ISD::FP_EXTEND:
assert(VT.isFloatingPoint() &&
Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
@@ -2946,7 +2947,7 @@
}
break;
case ISD::VECTOR_SHUFFLE:
- assert(0 && "should use getVectorShuffle constructor!");
+ LLVM_UNREACHABLE("should use getVectorShuffle constructor!");
break;
case ISD::BIT_CONVERT:
// Fold bit_convert nodes from a type to themselves.
@@ -4060,7 +4061,7 @@
SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
switch (NumVTs) {
- case 0: assert(0 && "Cannot have nodes without results!");
+ case 0: LLVM_UNREACHABLE("Cannot have nodes without results!");
case 1: return getVTList(VTs[0]);
case 2: return getVTList(VTs[0], VTs[1]);
case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
@@ -5341,7 +5342,7 @@
case ISD::CONVERT_RNDSAT: {
switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
- default: assert(0 && "Unknown cvt code!");
+ default: LLVM_UNREACHABLE("Unknown cvt code!");
case ISD::CVT_FF: return "cvt_ff";
case ISD::CVT_FS: return "cvt_fs";
case ISD::CVT_FU: return "cvt_fu";
@@ -5393,7 +5394,7 @@
case ISD::CONDCODE:
switch (cast<CondCodeSDNode>(this)->get()) {
- default: assert(0 && "Unknown setcc condition!");
+ default: LLVM_UNREACHABLE("Unknown setcc condition!");
case ISD::SETOEQ: return "setoeq";
case ISD::SETOGT: return "setogt";
case ISD::SETOGE: return "setoge";
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Sat Jul 11 15:10:48 2009
@@ -556,7 +556,7 @@
if (PartVT.getSizeInBits() == ValueVT.getSizeInBits())
return DAG.getNode(ISD::BIT_CONVERT, dl, ValueVT, Val);
- assert(0 && "Unknown mismatch!");
+ LLVM_UNREACHABLE("Unknown mismatch!");
return SDValue();
}
@@ -592,7 +592,7 @@
ValueVT = MVT::getIntegerVT(NumParts * PartBits);
Val = DAG.getNode(ExtendKind, dl, ValueVT, Val);
} else {
- assert(0 && "Unknown mismatch!");
+ LLVM_UNREACHABLE("Unknown mismatch!");
}
} else if (PartBits == ValueVT.getSizeInBits()) {
// Different types of the same size.
@@ -604,7 +604,7 @@
ValueVT = MVT::getIntegerVT(NumParts * PartBits);
Val = DAG.getNode(ISD::TRUNCATE, dl, ValueVT, Val);
} else {
- assert(0 && "Unknown mismatch!");
+ LLVM_UNREACHABLE("Unknown mismatch!");
}
}
@@ -1073,7 +1073,7 @@
case FCmpInst::FCMP_UNE: FOC = ISD::SETNE; FPC = ISD::SETUNE; break;
case FCmpInst::FCMP_TRUE: FOC = FPC = ISD::SETTRUE; break;
default:
- assert(0 && "Invalid FCmp predicate opcode!");
+ LLVM_UNREACHABLE("Invalid FCmp predicate opcode!");
FOC = FPC = ISD::SETFALSE;
break;
}
@@ -1099,7 +1099,7 @@
case ICmpInst::ICMP_SGT: return ISD::SETGT;
case ICmpInst::ICMP_UGT: return ISD::SETUGT;
default:
- assert(0 && "Invalid ICmp predicate opcode!");
+ LLVM_UNREACHABLE("Invalid ICmp predicate opcode!");
return ISD::SETNE;
}
}
@@ -1131,7 +1131,7 @@
Condition = getFCmpCondCode(FC->getPredicate());
} else {
Condition = ISD::SETEQ; // silence warning.
- assert(0 && "Unknown compare instruction");
+ LLVM_UNREACHABLE("Unknown compare instruction");
}
CaseBlock CB(Condition, BOp->getOperand(0),
@@ -4263,7 +4263,7 @@
case Intrinsic::gcread:
case Intrinsic::gcwrite:
- assert(0 && "GC failed to lower gcread/gcwrite intrinsics!");
+ LLVM_UNREACHABLE("GC failed to lower gcread/gcwrite intrinsics!");
return 0;
case Intrinsic::flt_rounds: {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/CallSite.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <vector>
#include <set>
@@ -535,12 +536,10 @@
void visitVACopy(CallInst &I);
void visitUserOp1(Instruction &I) {
- assert(0 && "UserOp1 should not exist at instruction selection time!");
- abort();
+ LLVM_UNREACHABLE("UserOp1 should not exist at instruction selection time!");
}
void visitUserOp2(Instruction &I) {
- assert(0 && "UserOp2 should not exist at instruction selection time!");
- abort();
+ LLVM_UNREACHABLE("UserOp2 should not exist at instruction selection time!");
}
const char *implVisitBinaryAtomic(CallInst& I, ISD::NodeType Op);
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sat Jul 11 15:10:48 2009
@@ -832,7 +832,7 @@
BI->dump();
}
if (EnableFastISelAbort)
- assert(0 && "FastISel didn't handle a PHI in a successor");
+ LLVM_UNREACHABLE("FastISel didn't handle a PHI in a successor");
break;
}
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/STLExtras.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
using namespace llvm;
@@ -1840,7 +1841,7 @@
if (CFP->getValueAPF().isNaN()) {
// If an operand is known to be a nan, we can fold it.
switch (ISD::getUnorderedFlavor(Cond)) {
- default: assert(0 && "Unknown flavor!");
+ default: LLVM_UNREACHABLE("Unknown flavor!");
case 0: // Known false.
return DAG.getConstant(0, VT);
case 1: // Known true.
@@ -2000,7 +2001,7 @@
SDValue Temp;
if (N0.getValueType() == MVT::i1 && foldBooleans) {
switch (Cond) {
- default: assert(0 && "Unknown integer setcc!");
+ default: LLVM_UNREACHABLE("Unknown integer setcc!");
case ISD::SETEQ: // X == Y -> ~(X^Y)
Temp = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
N0 = DAG.getNOT(dl, Temp, MVT::i1);
@@ -2310,7 +2311,7 @@
/// is.
static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
switch (CT) {
- default: assert(0 && "Unknown constraint type!");
+ default: LLVM_UNREACHABLE("Unknown constraint type!");
case TargetLowering::C_Other:
case TargetLowering::C_Unknown:
return 0;
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Sat Jul 11 15:10:48 2009
@@ -28,6 +28,7 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
@@ -1333,8 +1334,7 @@
DstSubIdx = CopyMI->getOperand(3).getImm();
SrcReg = CopyMI->getOperand(2).getReg();
} else if (!tii_->isMoveInstr(*CopyMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)){
- assert(0 && "Unrecognized copy instruction!");
- return false;
+ LLVM_UNREACHABLE("Unrecognized copy instruction!");
}
// If they are already joined we continue.
@@ -2051,7 +2051,7 @@
*tri_->getSuperRegisters(LHS.reg))
// Imprecise sub-register information. Can't handle it.
return false;
- assert(0 && "No copies from the RHS?");
+ LLVM_UNREACHABLE("No copies from the RHS?");
} else {
LHSValNo = EliminatedLHSVals[0];
}
Modified: llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp Sat Jul 11 15:10:48 2009
@@ -10,6 +10,7 @@
#define DEBUG_TYPE "virtregrewriter"
#include "VirtRegRewriter.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
@@ -999,7 +1000,7 @@
// Unfold current MI.
SmallVector<MachineInstr*, 4> NewMIs;
if (!TII->unfoldMemoryOperand(MF, &MI, VirtReg, false, false, NewMIs))
- assert(0 && "Unable unfold the load / store folding instruction!");
+ LLVM_UNREACHABLE("Unable unfold the load / store folding instruction!");
assert(NewMIs.size() == 1);
AssignPhysToVirtReg(NewMIs[0], VirtReg, PhysReg);
VRM.transferRestorePts(&MI, NewMIs[0]);
@@ -1015,7 +1016,7 @@
NextMII = next(NextMII);
NewMIs.clear();
if (!TII->unfoldMemoryOperand(MF, &NextMI, VirtReg, false, false, NewMIs))
- assert(0 && "Unable unfold the load / store folding instruction!");
+ LLVM_UNREACHABLE("Unable unfold the load / store folding instruction!");
assert(NewMIs.size() == 1);
AssignPhysToVirtReg(NewMIs[0], VirtReg, PhysReg);
VRM.transferRestorePts(&NextMI, NewMIs[0]);
@@ -1451,7 +1452,7 @@
assert(RC && "Unable to determine register class!");
int SS = VRM.getEmergencySpillSlot(RC);
if (UsedSS.count(SS))
- assert(0 && "Need to spill more than one physical registers!");
+ LLVM_UNREACHABLE("Need to spill more than one physical registers!");
UsedSS.insert(SS);
TII->storeRegToStackSlot(MBB, MII, PhysReg, true, SS, RC);
MachineInstr *StoreMI = prior(MII);
@@ -2176,7 +2177,7 @@
llvm::VirtRegRewriter* llvm::createVirtRegRewriter() {
switch (RewriterOpt) {
- default: assert(0 && "Unreachable!");
+ default: LLVM_UNREACHABLE("Unreachable!");
case local:
return new LocalRewriter();
case trivial:
Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Sat Jul 11 15:10:48 2009
@@ -421,7 +421,7 @@
const_cast<GlobalVariable *>(dyn_cast<GlobalVariable>(GV)))
EmitGlobalVariable(GVar);
else
- assert(0 && "Global hasn't had an address allocated yet!");
+ LLVM_UNREACHABLE("Global hasn't had an address allocated yet!");
return state.getGlobalAddressMap(locked)[GV];
}
@@ -548,7 +548,7 @@
GenericValue GV = getConstantValue(Op0);
const Type* DestTy = CE->getType();
switch (Op0->getType()->getTypeID()) {
- default: assert(0 && "Invalid bitcast operand");
+ default: LLVM_UNREACHABLE("Invalid bitcast operand");
case Type::IntegerTyID:
assert(DestTy->isFloatingPoint() && "invalid bitcast");
if (DestTy == Type::FloatTy)
@@ -590,7 +590,7 @@
default: LLVM_UNREACHABLE("Bad add type!");
case Type::IntegerTyID:
switch (CE->getOpcode()) {
- default: assert(0 && "Invalid integer opcode");
+ default: LLVM_UNREACHABLE("Invalid integer opcode");
case Instruction::Add: GV.IntVal = LHS.IntVal + RHS.IntVal; break;
case Instruction::Sub: GV.IntVal = LHS.IntVal - RHS.IntVal; break;
case Instruction::Mul: GV.IntVal = LHS.IntVal * RHS.IntVal; break;
@@ -638,7 +638,7 @@
case Type::FP128TyID: {
APFloat apfLHS = APFloat(LHS.IntVal);
switch (CE->getOpcode()) {
- default: assert(0 && "Invalid long double opcode");llvm_unreachable();
+ default: LLVM_UNREACHABLE("Invalid long double opcode");llvm_unreachable();
case Instruction::FAdd:
apfLHS.add(APFloat(RHS.IntVal), APFloat::rmNearestTiesToEven);
GV.IntVal = apfLHS.bitcastToAPInt();
@@ -698,7 +698,7 @@
else if (const GlobalVariable* GV = dyn_cast<GlobalVariable>(C))
Result = PTOGV(getOrEmitGlobalVariable(const_cast<GlobalVariable*>(GV)));
else
- assert(0 && "Unknown constant pointer type!");
+ LLVM_UNREACHABLE("Unknown constant pointer type!");
break;
default:
std::string msg;
@@ -881,7 +881,7 @@
}
cerr << "Bad Type: " << *Init->getType() << "\n";
- assert(0 && "Unknown constant type to initialize memory with!");
+ LLVM_UNREACHABLE("Unknown constant type to initialize memory with!");
}
/// EmitGlobals - Emit all of the global variables to memory, storing their
Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
#include "llvm-c/ExecutionEngine.h"
#include "llvm/ExecutionEngine/GenericValue.h"
#include "llvm/ExecutionEngine/ExecutionEngine.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cstring>
using namespace llvm;
@@ -45,8 +46,7 @@
GenVal->DoubleVal = N;
break;
default:
- assert(0 && "LLVMGenericValueToFloat supports only float and double.");
- break;
+ LLVM_UNREACHABLE("LLVMGenericValueToFloat supports only float and double.");
}
return wrap(GenVal);
}
@@ -75,7 +75,7 @@
case Type::DoubleTyID:
return unwrap(GenVal)->DoubleVal;
default:
- assert(0 && "LLVMGenericValueToFloat supports only float and double.");
+ LLVM_UNREACHABLE("LLVMGenericValueToFloat supports only float and double.");
break;
}
return 0; // Not reached
Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp Sat Jul 11 15:10:48 2009
@@ -1079,7 +1079,7 @@
} else if (SrcTy->isInteger()) {
Dest.IntVal = Src.IntVal;
} else
- assert(0 && "Invalid BitCast");
+ LLVM_UNREACHABLE("Invalid BitCast");
} else if (DstTy == Type::FloatTy) {
if (SrcTy->isInteger())
Dest.FloatVal = Src.IntVal.bitsToFloat();
@@ -1091,7 +1091,7 @@
else
Dest.DoubleVal = Src.DoubleVal;
} else
- assert(0 && "Invalid Bitcast");
+ LLVM_UNREACHABLE("Invalid Bitcast");
return Dest;
}
@@ -1345,7 +1345,7 @@
DOUT << " --> ";
const GenericValue &Val = SF.Values[&I];
switch (I.getType()->getTypeID()) {
- default: assert(0 && "Invalid GenericValue Type");
+ default: LLVM_UNREACHABLE("Invalid GenericValue Type");
case Type::VoidTyID: DOUT << "void"; break;
case Type::FloatTyID: DOUT << "float " << Val.FloatVal; break;
case Type::DoubleTyID: DOUT << "double " << Val.DoubleVal; break;
Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h (original)
+++ llvm/trunk/lib/ExecutionEngine/Interpreter/Interpreter.h Sat Jul 11 15:10:48 2009
@@ -21,6 +21,7 @@
#include "llvm/Support/CallSite.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
namespace llvm {
@@ -145,7 +146,9 @@
void visitLoadInst(LoadInst &I);
void visitStoreInst(StoreInst &I);
void visitGetElementPtrInst(GetElementPtrInst &I);
- void visitPHINode(PHINode &PN) { assert(0 && "PHI nodes already handled!"); }
+ void visitPHINode(PHINode &PN) {
+ LLVM_UNREACHABLE("PHI nodes already handled!");
+ }
void visitTruncInst(TruncInst &I);
void visitZExtInst(ZExtInst &I);
void visitSExtInst(SExtInst &I);
@@ -174,7 +177,7 @@
void visitVAArgInst(VAArgInst &I);
void visitInstruction(Instruction &I) {
cerr << I;
- assert(0 && "Instruction not interpretable yet!");
+ LLVM_UNREACHABLE("Instruction not interpretable yet!");
}
GenericValue callExternalFunction(Function *F,
Modified: llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Sat Jul 11 15:10:48 2009
@@ -410,7 +410,7 @@
if (ArgValues.empty()) {
GenericValue rv;
switch (RetTy->getTypeID()) {
- default: assert(0 && "Unknown return type for function call!");
+ default: LLVM_UNREACHABLE("Unknown return type for function call!");
case Type::IntegerTyID: {
unsigned BitWidth = cast<IntegerType>(RetTy)->getBitWidth();
if (BitWidth == 1)
@@ -424,7 +424,7 @@
else if (BitWidth <= 64)
rv.IntVal = APInt(BitWidth, ((int64_t(*)())(intptr_t)FPtr)());
else
- assert(0 && "Integer types > 64 bits not supported");
+ LLVM_UNREACHABLE("Integer types > 64 bits not supported");
return rv;
}
case Type::VoidTyID:
@@ -439,7 +439,7 @@
case Type::X86_FP80TyID:
case Type::FP128TyID:
case Type::PPC_FP128TyID:
- assert(0 && "long double not supported yet");
+ LLVM_UNREACHABLE("long double not supported yet");
return rv;
case Type::PointerTyID:
return PTOGV(((void*(*)())(intptr_t)FPtr)());
@@ -467,7 +467,7 @@
const Type *ArgTy = FTy->getParamType(i);
const GenericValue &AV = ArgValues[i];
switch (ArgTy->getTypeID()) {
- default: assert(0 && "Unknown argument type for function call!");
+ default: LLVM_UNREACHABLE("Unknown argument type for function call!");
case Type::IntegerTyID:
C = ConstantInt::get(AV.IntVal);
break;
Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp Sat Jul 11 15:10:48 2009
@@ -21,6 +21,7 @@
#include "llvm/CodeGen/MachineLocation.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/ExecutionEngine/JITMemoryManager.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetInstrInfo.h"
@@ -110,7 +111,7 @@
JCE->emitULEB128Bytes(Offset);
} else {
- assert(0 && "Machine move no supported yet.");
+ LLVM_UNREACHABLE("Machine move no supported yet.");
}
} else if (Src.isReg() &&
Src.getReg() == MachineLocation::VirtualFP) {
@@ -118,7 +119,7 @@
JCE->emitByte(dwarf::DW_CFA_def_cfa_register);
JCE->emitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), true));
} else {
- assert(0 && "Machine move no supported yet.");
+ LLVM_UNREACHABLE("Machine move no supported yet.");
}
} else {
unsigned Reg = RI->getDwarfRegNum(Src.getReg(), true);
@@ -761,7 +762,7 @@
FinalSize += TargetAsmInfo::getULEB128Size(Offset);
} else {
- assert(0 && "Machine move no supported yet.");
+ LLVM_UNREACHABLE("Machine move no supported yet.");
}
} else if (Src.isReg() &&
Src.getReg() == MachineLocation::VirtualFP) {
@@ -770,7 +771,7 @@
unsigned RegNum = RI->getDwarfRegNum(Dst.getReg(), true);
FinalSize += TargetAsmInfo::getULEB128Size(RegNum);
} else {
- assert(0 && "Machine move no supported yet.");
+ LLVM_UNREACHABLE("Machine move no supported yet.");
}
} else {
unsigned Reg = RI->getDwarfRegNum(Src.getReg(), true);
Modified: llvm/trunk/lib/Linker/LinkItems.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkItems.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Linker/LinkItems.cpp (original)
+++ llvm/trunk/lib/Linker/LinkItems.cpp Sat Jul 11 15:10:48 2009
@@ -14,6 +14,7 @@
#include "llvm/Linker.h"
#include "llvm/Module.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Bitcode/ReaderWriter.h"
@@ -80,7 +81,7 @@
std::string Magic;
Pathname.getMagicNumber(Magic, 64);
switch (sys::IdentifyFileType(Magic.c_str(), 64)) {
- default: assert(0 && "Bad file type identification");
+ default: LLVM_UNREACHABLE("Bad file type identification");
case sys::Unknown_FileType:
return warning("Supposed library '" + Lib + "' isn't a library.");
@@ -178,7 +179,7 @@
std::string Magic;
File.getMagicNumber(Magic, 64);
switch (sys::IdentifyFileType(Magic.c_str(), 64)) {
- default: assert(0 && "Bad file type identification");
+ default: LLVM_UNREACHABLE("Bad file type identification");
case sys::Unknown_FileType:
return warning("Ignoring file '" + File.toString() +
"' because does not contain bitcode.");
Modified: llvm/trunk/lib/Linker/LinkModules.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Linker/LinkModules.cpp (original)
+++ llvm/trunk/lib/Linker/LinkModules.cpp Sat Jul 11 15:10:48 2009
@@ -26,6 +26,7 @@
#include "llvm/Instructions.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/Support/Streams.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/System/Path.h"
#include "llvm/ADT/DenseMap.h"
#include <sstream>
@@ -392,7 +393,7 @@
Result = CE->getWithOperands(Ops);
} else {
assert(!isa<GlobalValue>(CPV) && "Unmapped global?");
- assert(0 && "Unknown type of derived type constant value!");
+ LLVM_UNREACHABLE("Unknown type of derived type constant value!");
}
} else if (isa<InlineAsm>(In)) {
Result = const_cast<Value*>(In);
@@ -409,7 +410,7 @@
PrintMap(ValueMap);
cerr << "Couldn't remap value: " << (void*)In << " " << *In << "\n";
- assert(0 && "Couldn't remap value!");
+ LLVM_UNREACHABLE("Couldn't remap value!");
#endif
return 0;
}
@@ -899,9 +900,9 @@
// Nothing is required, mapped values will take the new global
// automatically.
} else if (DGVar->hasAppendingLinkage()) {
- assert(0 && "Appending linkage unimplemented!");
+ LLVM_UNREACHABLE("Appending linkage unimplemented!");
} else {
- assert(0 && "Unknown linkage!");
+ LLVM_UNREACHABLE("Unknown linkage!");
}
} else {
// Copy the initializer over now...
Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original)
+++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Sat Jul 11 15:10:48 2009
@@ -14,7 +14,9 @@
#include "llvm/MC/MCSection.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/MCValue.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
+
using namespace llvm;
namespace {
@@ -186,7 +188,7 @@
// Need target hooks to know how to print this.
switch (Size) {
default:
- assert(0 && "Invalid size for machine code value!");
+ LLVM_UNREACHABLE("Invalid size for machine code value!");
case 1: OS << ".byte"; break;
case 2: OS << ".short"; break;
case 4: OS << ".long"; break;
@@ -207,9 +209,9 @@
switch (ValueSize) {
default:
- assert(0 && "Invalid size for machine code value!");
+ LLVM_UNREACHABLE("Invalid size for machine code value!");
case 8:
- assert(0 && "Unsupported alignment size!");
+ LLVM_UNREACHABLE("Unsupported alignment size!");
case 1: OS << (IsPow2 ? ".p2align" : ".balign"); break;
case 2: OS << (IsPow2 ? ".p2alignw" : ".balignw"); break;
case 4: OS << (IsPow2 ? ".p2alignl" : ".balignl"); break;
Modified: llvm/trunk/lib/Support/APFloat.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APFloat.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Support/APFloat.cpp (original)
+++ llvm/trunk/lib/Support/APFloat.cpp Sat Jul 11 15:10:48 2009
@@ -14,6 +14,7 @@
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/FoldingSet.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cstring>
@@ -1068,7 +1069,7 @@
switch (rounding_mode) {
default:
- assert(0);
+ llvm_unreachable();
case rmNearestTiesToAway:
return lost_fraction == lfExactlyHalf || lost_fraction == lfMoreThanHalf;
@@ -1207,7 +1208,7 @@
{
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
@@ -1331,7 +1332,7 @@
{
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
@@ -1373,7 +1374,7 @@
{
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
@@ -1415,7 +1416,7 @@
{
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
@@ -1692,7 +1693,7 @@
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
@@ -2929,7 +2930,7 @@
else if (api.getBitWidth()==128 && !isIEEE)
return initFromPPCDoubleDoubleAPInt(api);
else
- assert(0);
+ llvm_unreachable();
}
APFloat::APFloat(const APInt& api, bool isIEEE)
Modified: llvm/trunk/lib/Support/APInt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Support/APInt.cpp (original)
+++ llvm/trunk/lib/Support/APInt.cpp Sat Jul 11 15:10:48 2009
@@ -17,6 +17,7 @@
#include "llvm/ADT/FoldingSet.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <cmath>
@@ -1386,7 +1387,7 @@
else
return x_old + 1;
} else
- assert(0 && "Error in APInt::sqrt computation");
+ LLVM_UNREACHABLE("Error in APInt::sqrt computation");
return x_old + 1;
}
@@ -2032,7 +2033,7 @@
char cdigit = str[i];
if (radix == 16) {
if (!isxdigit(cdigit))
- assert(0 && "Invalid hex digit in string");
+ LLVM_UNREACHABLE("Invalid hex digit in string");
if (isdigit(cdigit))
digit = cdigit - '0';
else if (cdigit >= 'a')
@@ -2040,7 +2041,7 @@
else if (cdigit >= 'A')
digit = cdigit - 'A' + 10;
else
- assert(0 && "huh? we shouldn't get here");
+ LLVM_UNREACHABLE("huh? we shouldn't get here");
} else if (isdigit(cdigit)) {
digit = cdigit - '0';
assert((radix == 10 ||
@@ -2048,7 +2049,7 @@
(radix == 2 && (digit == 0 || digit == 1))) &&
"Invalid digit in string for given radix");
} else {
- assert(0 && "Invalid character in digit string");
+ LLVM_UNREACHABLE("Invalid character in digit string");
}
// Shift or multiply the value by the radix
Modified: llvm/trunk/lib/Support/CommandLine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/CommandLine.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Support/CommandLine.cpp (original)
+++ llvm/trunk/lib/Support/CommandLine.cpp Sat Jul 11 15:10:48 2009
@@ -693,7 +693,7 @@
ValNo++;
break;
default:
- assert(0 && "Internal error, unexpected NumOccurrences flag in "
+ LLVM_UNREACHABLE("Internal error, unexpected NumOccurrences flag in "
"positional argument processing!");
}
}
Modified: llvm/trunk/lib/Support/Dwarf.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Dwarf.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Dwarf.cpp (original)
+++ llvm/trunk/lib/Support/Dwarf.cpp Sat Jul 11 15:10:48 2009
@@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
@@ -83,7 +84,7 @@
case DW_TAG_lo_user: return "DW_TAG_lo_user";
case DW_TAG_hi_user: return "DW_TAG_hi_user";
}
- assert(0 && "Unknown Dwarf Tag");
+ LLVM_UNREACHABLE("Unknown Dwarf Tag");
return "";
}
@@ -94,7 +95,7 @@
case DW_CHILDREN_no: return "CHILDREN_no";
case DW_CHILDREN_yes: return "CHILDREN_yes";
}
- assert(0 && "Unknown Dwarf ChildrenFlag");
+ LLVM_UNREACHABLE("Unknown Dwarf ChildrenFlag");
return "";
}
@@ -205,7 +206,7 @@
case DW_AT_APPLE_major_runtime_vers: return "DW_AT_APPLE_major_runtime_vers";
case DW_AT_APPLE_runtime_class: return "DW_AT_APPLE_runtime_class";
}
- assert(0 && "Unknown Dwarf Attribute");
+ LLVM_UNREACHABLE("Unknown Dwarf Attribute");
return "";
}
@@ -235,7 +236,7 @@
case DW_FORM_ref_udata: return "FORM_ref_udata";
case DW_FORM_indirect: return "FORM_indirect";
}
- assert(0 && "Unknown Dwarf Form Encoding");
+ LLVM_UNREACHABLE("Unknown Dwarf Form Encoding");
return "";
}
@@ -310,7 +311,7 @@
case DW_OP_lo_user: return "OP_lo_user";
case DW_OP_hi_user: return "OP_hi_user";
}
- assert(0 && "Unknown Dwarf Operation Encoding");
+ LLVM_UNREACHABLE("Unknown Dwarf Operation Encoding");
return "";
}
@@ -336,7 +337,7 @@
case DW_ATE_lo_user: return "ATE_lo_user";
case DW_ATE_hi_user: return "ATE_hi_user";
}
- assert(0 && "Unknown Dwarf Attribute Encoding");
+ LLVM_UNREACHABLE("Unknown Dwarf Attribute Encoding");
return "";
}
@@ -350,7 +351,7 @@
case DW_DS_leading_separate: return "DS_leading_separate";
case DW_DS_trailing_separate: return "DS_trailing_separate";
}
- assert(0 && "Unknown Dwarf Decimal Sign Attribute");
+ LLVM_UNREACHABLE("Unknown Dwarf Decimal Sign Attribute");
return "";
}
@@ -364,7 +365,7 @@
case DW_END_lo_user: return "END_lo_user";
case DW_END_hi_user: return "END_hi_user";
}
- assert(0 && "Unknown Dwarf Endianity");
+ LLVM_UNREACHABLE("Unknown Dwarf Endianity");
return "";
}
@@ -377,7 +378,7 @@
case DW_ACCESS_protected: return "ACCESS_protected";
case DW_ACCESS_private: return "ACCESS_private";
}
- assert(0 && "Unknown Dwarf Accessibility");
+ LLVM_UNREACHABLE("Unknown Dwarf Accessibility");
return "";
}
@@ -389,7 +390,7 @@
case DW_VIS_exported: return "VIS_exported";
case DW_VIS_qualified: return "VIS_qualified";
}
- assert(0 && "Unknown Dwarf Visibility");
+ LLVM_UNREACHABLE("Unknown Dwarf Visibility");
return "";
}
@@ -401,7 +402,7 @@
case DW_VIRTUALITY_virtual: return "VIRTUALITY_virtual";
case DW_VIRTUALITY_pure_virtual: return "VIRTUALITY_pure_virtual";
}
- assert(0 && "Unknown Dwarf Virtuality");
+ LLVM_UNREACHABLE("Unknown Dwarf Virtuality");
return "";
}
@@ -431,7 +432,7 @@
case DW_LANG_lo_user: return "LANG_lo_user";
case DW_LANG_hi_user: return "LANG_hi_user";
}
- assert(0 && "Unknown Dwarf Language");
+ LLVM_UNREACHABLE("Unknown Dwarf Language");
return "";
}
@@ -444,7 +445,7 @@
case DW_ID_down_case: return "ID_down_case";
case DW_ID_case_insensitive: return "ID_case_insensitive";
}
- assert(0 && "Unknown Dwarf Identifier Case");
+ LLVM_UNREACHABLE("Unknown Dwarf Identifier Case");
return "";
}
@@ -458,7 +459,7 @@
case DW_CC_lo_user: return "CC_lo_user";
case DW_CC_hi_user: return "CC_hi_user";
}
- assert(0 && "Unknown Dwarf Calling Convention");
+ LLVM_UNREACHABLE("Unknown Dwarf Calling Convention");
return "";
}
@@ -471,7 +472,7 @@
case DW_INL_declared_not_inlined: return "INL_declared_not_inlined";
case DW_INL_declared_inlined: return "INL_declared_inlined";
}
- assert(0 && "Unknown Dwarf Inline Code");
+ LLVM_UNREACHABLE("Unknown Dwarf Inline Code");
return "";
}
@@ -482,7 +483,7 @@
case DW_ORD_row_major: return "ORD_row_major";
case DW_ORD_col_major: return "ORD_col_major";
}
- assert(0 && "Unknown Dwarf Array Order");
+ LLVM_UNREACHABLE("Unknown Dwarf Array Order");
return "";
}
@@ -493,7 +494,7 @@
case DW_DSC_label: return "DSC_label";
case DW_DSC_range: return "DSC_range";
}
- assert(0 && "Unknown Dwarf Discriminant Descriptor");
+ LLVM_UNREACHABLE("Unknown Dwarf Discriminant Descriptor");
return "";
}
@@ -514,7 +515,7 @@
case DW_LNS_set_epilogue_begin: return "LNS_set_epilogue_begin";
case DW_LNS_set_isa: return "LNS_set_isa";
}
- assert(0 && "Unknown Dwarf Line Number Standard");
+ LLVM_UNREACHABLE("Unknown Dwarf Line Number Standard");
return "";
}
@@ -529,7 +530,7 @@
case DW_LNE_lo_user: return "LNE_lo_user";
case DW_LNE_hi_user: return "LNE_hi_user";
}
- assert(0 && "Unknown Dwarf Line Number Extended Opcode Encoding");
+ LLVM_UNREACHABLE("Unknown Dwarf Line Number Extended Opcode Encoding");
return "";
}
@@ -544,7 +545,7 @@
case DW_MACINFO_end_file: return "MACINFO_end_file";
case DW_MACINFO_vendor_ext: return "MACINFO_vendor_ext";
}
- assert(0 && "Unknown Dwarf Macinfo Type Encodings");
+ LLVM_UNREACHABLE("Unknown Dwarf Macinfo Type Encodings");
return "";
}
@@ -580,7 +581,7 @@
case DW_CFA_lo_user: return "CFA_lo_user";
case DW_CFA_hi_user: return "CFA_hi_user";
}
- assert(0 && "Unknown Dwarf Call Frame Instruction Encodings");
+ LLVM_UNREACHABLE("Unknown Dwarf Call Frame Instruction Encodings");
return "";
}
Modified: llvm/trunk/lib/Support/ErrorHandling.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/ErrorHandling.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Support/ErrorHandling.cpp (original)
+++ llvm/trunk/lib/Support/ErrorHandling.cpp Sat Jul 11 15:10:48 2009
@@ -44,7 +44,9 @@
exit(1);
}
-void llvm_unreachable(void) {
+void llvm_unreachable(const char *msg) {
+ if (msg)
+ errs() << msg << "\n";
abort();
}
}
Modified: llvm/trunk/lib/Support/FoldingSet.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/FoldingSet.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Support/FoldingSet.cpp (original)
+++ llvm/trunk/lib/Support/FoldingSet.cpp Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
//===----------------------------------------------------------------------===//
#include "llvm/ADT/FoldingSet.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
#include <cstring>
@@ -50,7 +51,7 @@
else if (sizeof(long) == sizeof(long long)) {
AddInteger((unsigned long long)I);
} else {
- assert(0 && "unexpected sizeof(long)");
+ LLVM_UNREACHABLE("unexpected sizeof(long)");
}
}
void FoldingSetNodeID::AddInteger(long long I) {
Modified: llvm/trunk/lib/Target/ARM/ARM.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.h (original)
+++ llvm/trunk/lib/Target/ARM/ARM.h Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
#ifndef TARGET_ARM_H
#define TARGET_ARM_H
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <cassert>
@@ -51,7 +52,7 @@
inline static CondCodes getOppositeCondition(CondCodes CC){
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case EQ: return NE;
case NE: return EQ;
case HS: return LO;
@@ -72,7 +73,7 @@
inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case ARMCC::EQ: return "eq";
case ARMCC::NE: return "ne";
case ARMCC::HS: return "hs";
Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
#define LLVM_TARGET_ARM_ARMADDRESSINGMODES_H
#include "llvm/CodeGen/SelectionDAGNodes.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
@@ -37,7 +38,7 @@
static inline const char *getShiftOpcStr(ShiftOpc Op) {
switch (Op) {
- default: assert(0 && "Unknown shift opc!");
+ default: LLVM_UNREACHABLE("Unknown shift opc!");
case ARM_AM::asr: return "asr";
case ARM_AM::lsl: return "lsl";
case ARM_AM::lsr: return "lsr";
@@ -70,7 +71,7 @@
static inline const char *getAMSubModeStr(AMSubMode Mode) {
switch (Mode) {
- default: assert(0 && "Unknown addressing sub-mode!");
+ default: LLVM_UNREACHABLE("Unknown addressing sub-mode!");
case ARM_AM::ia: return "ia";
case ARM_AM::ib: return "ib";
case ARM_AM::da: return "da";
@@ -80,7 +81,7 @@
static inline const char *getAMSubModeAltStr(AMSubMode Mode, bool isLD) {
switch (Mode) {
- default: assert(0 && "Unknown addressing sub-mode!");
+ default: LLVM_UNREACHABLE("Unknown addressing sub-mode!");
case ARM_AM::ia: return isLD ? "fd" : "ea";
case ARM_AM::ib: return isLD ? "ed" : "fa";
case ARM_AM::da: return isLD ? "fa" : "ed";
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
static cl::opt<bool>
@@ -433,8 +434,7 @@
return 0;
switch (MI->getOpcode()) {
default:
- assert(0 && "Unknown or unset size field for instr!");
- break;
+ LLVM_UNREACHABLE("Unknown or unset size field for instr!");
case TargetInstrInfo::IMPLICIT_DEF:
case TargetInstrInfo::DECLARE:
case TargetInstrInfo::DBG_LABEL:
Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -707,12 +707,12 @@
}
unsigned ARMBaseRegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned ARMBaseRegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Sat Jul 11 15:10:48 2009
@@ -24,6 +24,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/Statistic.h"
@@ -448,7 +449,7 @@
Bits = 8; // Taking the address of a CP entry.
break;
}
- assert(0 && "Unknown addressing mode for CP reference!");
+ LLVM_UNREACHABLE("Unknown addressing mode for CP reference!");
case ARMII::AddrMode1: // AM1: 8 bits << 2
Bits = 8;
Scale = 4; // Taking the address of a CP entry.
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -470,7 +470,7 @@
/// IntCCToARMCC - Convert a DAG integer condition code to an ARM CC
static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code!");
+ default: LLVM_UNREACHABLE("Unknown condition code!");
case ISD::SETNE: return ARMCC::NE;
case ISD::SETEQ: return ARMCC::EQ;
case ISD::SETGT: return ARMCC::GT;
@@ -492,7 +492,7 @@
bool Invert = false;
CondCode2 = ARMCC::AL;
switch (CC) {
- default: assert(0 && "Unknown FP condition!");
+ default: LLVM_UNREACHABLE("Unknown FP condition!");
case ISD::SETEQ:
case ISD::SETOEQ: CondCode = ARMCC::EQ; break;
case ISD::SETGT:
@@ -661,7 +661,7 @@
bool Return) const {
switch (CC) {
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::C:
case CallingConv::Fast:
// Use target triple & subtarget features to do actual dispatch.
@@ -745,7 +745,7 @@
}
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::BCvt:
Val = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), Val);
@@ -858,7 +858,7 @@
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
@@ -1060,7 +1060,7 @@
SDValue Arg = Op.getOperand(realRVLocIdx*2+1);
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::BCvt:
Arg = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getLocVT(), Arg);
@@ -1442,7 +1442,7 @@
// to 32 bits. Insert an assert[sz]ext to capture this, then
// truncate to the right size.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::BCvt:
ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), ArgValue);
@@ -2006,7 +2006,7 @@
if (Op.getOperand(1).getValueType().isFloatingPoint()) {
switch (SetCCOpcode) {
- default: assert(0 && "Illegal FP comparison"); break;
+ default: LLVM_UNREACHABLE("Illegal FP comparison"); break;
case ISD::SETUNE:
case ISD::SETNE: Invert = true; // Fallthrough
case ISD::SETOEQ:
@@ -2045,7 +2045,7 @@
} else {
// Integer comparisons.
switch (SetCCOpcode) {
- default: assert(0 && "Illegal integer comparison"); break;
+ default: LLVM_UNREACHABLE("Illegal integer comparison"); break;
case ISD::SETNE: Invert = true;
case ISD::SETEQ: Opc = ARMISD::VCEQ; break;
case ISD::SETLT: Swap = true;
@@ -2149,7 +2149,7 @@
}
default:
- assert(0 && "unexpected size for isVMOVSplat");
+ LLVM_UNREACHABLE("unexpected size for isVMOVSplat");
break;
}
@@ -2191,7 +2191,7 @@
case 16: CanonicalVT = MVT::v4i16; break;
case 32: CanonicalVT = MVT::v2i32; break;
case 64: CanonicalVT = MVT::v1i64; break;
- default: assert(0 && "unexpected splat element type"); break;
+ default: LLVM_UNREACHABLE("unexpected splat element type"); break;
}
} else {
assert(VT.is128BitVector() && "unknown splat vector size");
@@ -2200,7 +2200,7 @@
case 16: CanonicalVT = MVT::v8i16; break;
case 32: CanonicalVT = MVT::v4i32; break;
case 64: CanonicalVT = MVT::v2i64; break;
- default: assert(0 && "unexpected splat element type"); break;
+ default: LLVM_UNREACHABLE("unexpected splat element type"); break;
}
}
@@ -2303,7 +2303,7 @@
SelectionDAG &DAG) {
switch (N->getOpcode()) {
default:
- assert(0 && "Don't know how to custom expand this!");
+ LLVM_UNREACHABLE("Don't know how to custom expand this!");
return;
case ISD::BIT_CONVERT:
Results.push_back(ExpandBIT_CONVERT(N, DAG));
@@ -2628,7 +2628,7 @@
LLVM_UNREACHABLE("invalid shift count for narrowing vector shift intrinsic");
default:
- assert(0 && "unhandled vector shift");
+ LLVM_UNREACHABLE("unhandled vector shift");
}
switch (IntNo) {
@@ -2720,7 +2720,7 @@
int64_t Cnt;
switch (N->getOpcode()) {
- default: assert(0 && "unexpected shift opcode");
+ default: LLVM_UNREACHABLE("unexpected shift opcode");
case ISD::SHL:
if (isVShiftLImm(N->getOperand(1), VT, false, Cnt))
@@ -2763,7 +2763,7 @@
unsigned Opc = 0;
switch (N->getOpcode()) {
- default: assert(0 && "unexpected opcode");
+ default: LLVM_UNREACHABLE("unexpected opcode");
case ISD::SIGN_EXTEND:
Opc = ARMISD::VGETLANEs;
break;
Modified: llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Sat Jul 11 15:10:48 2009
@@ -338,7 +338,7 @@
bool rev = false;
bool inv = false;
switch(CC) {
- default: DEBUG(N->dump(CurDAG)); assert(0 && "Unknown FP comparison!");
+ default: DEBUG(N->dump(CurDAG)); LLVM_UNREACHABLE("Unknown FP comparison!");
case ISD::SETEQ: case ISD::SETOEQ: case ISD::SETUEQ:
Opc = Alpha::CMPTEQ; break;
case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT:
@@ -472,7 +472,7 @@
} else if (TypeOperands[i] == MVT::f64) {
Opc = Alpha::STT;
} else
- assert(0 && "Unknown operand");
+ LLVM_UNREACHABLE("Unknown operand");
SDValue Ops[] = { CallOperands[i], getI64Imm((i - 6) * 8),
CurDAG->getCopyFromReg(Chain, dl, Alpha::R30, MVT::i64),
@@ -489,7 +489,7 @@
CallOperands[i], InFlag);
InFlag = Chain.getValue(1);
} else
- assert(0 && "Unknown operand");
+ LLVM_UNREACHABLE("Unknown operand");
}
// Finally, once everything is in registers to pass to the call, emit the
@@ -512,7 +512,7 @@
std::vector<SDValue> CallResults;
switch (N->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unexpected ret value!");
+ default: LLVM_UNREACHABLE("Unexpected ret value!");
case MVT::Other: break;
case MVT::i64:
Chain = CurDAG->getCopyFromReg(Chain, dl,
Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -380,7 +380,7 @@
for (unsigned i = 0, e = Args.size(); i != e; ++i)
{
switch (getValueType(Args[i].Ty).getSimpleVT()) {
- default: assert(0 && "Unexpected ValueType for argument!");
+ default: LLVM_UNREACHABLE("Unexpected ValueType for argument!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
@@ -476,7 +476,7 @@
SDValue AlphaTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
DebugLoc dl = Op.getDebugLoc();
switch (Op.getOpcode()) {
- default: assert(0 && "Wasn't expecting to be able to lower this!");
+ default: LLVM_UNREACHABLE("Wasn't expecting to be able to lower this!");
case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG,
VarArgsBase,
VarArgsOffset);
@@ -527,7 +527,7 @@
return Lo;
}
case ISD::GlobalTLSAddress:
- assert(0 && "TLS not implemented for Alpha.");
+ LLVM_UNREACHABLE("TLS not implemented for Alpha.");
case ISD::GlobalAddress: {
GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op);
GlobalValue *GV = GSDN->getGlobal();
Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp Sat Jul 11 15:10:48 2009
@@ -332,7 +332,7 @@
case Alpha::FBLE: return Alpha::FBGT;
case Alpha::FBLT: return Alpha::FBGE;
default:
- assert(0 && "Unknown opcode");
+ LLVM_UNREACHABLE("Unknown opcode");
}
return 0; // Not reached
}
Modified: llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp Sat Jul 11 15:10:48 2009
@@ -72,7 +72,7 @@
void AlphaJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
//FIXME
- assert(0);
+ llvm_unreachable();
}
static TargetJITInfo::JITCompilerFn JITCompilerFunction;
@@ -241,7 +241,7 @@
long idx = 0;
bool doCommon = true;
switch ((Alpha::RelocationType)MR->getRelocationType()) {
- default: assert(0 && "Unknown relocation type!");
+ default: LLVM_UNREACHABLE("Unknown relocation type!");
case Alpha::reloc_literal:
//This is a LDQl
idx = MR->getGOTIndex();
@@ -281,7 +281,7 @@
DOUT << "LDA: " << idx << "\n";
break;
default:
- assert(0 && "Cannot handle gpdist yet");
+ LLVM_UNREACHABLE("Cannot handle gpdist yet");
}
break;
case Alpha::reloc_bsr: {
Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -307,7 +307,7 @@
}
unsigned AlphaRegisterInfo::getRARegister() const {
- assert(0 && "What is the return address register");
+ LLVM_UNREACHABLE("What is the return address register");
return 0;
}
@@ -316,17 +316,17 @@
}
unsigned AlphaRegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned AlphaRegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
int AlphaRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "What is the dwarf register number");
+ LLVM_UNREACHABLE("What is the dwarf register number");
return -1;
}
Modified: llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -155,7 +155,7 @@
EmitAlignment(MF.getAlignment(), F);
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
case Function::PrivateLinkage:
break;
Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original)
+++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Sat Jul 11 15:10:48 2009
@@ -287,11 +287,11 @@
void visitBranchInst(BranchInst &I);
void visitSwitchInst(SwitchInst &I);
void visitInvokeInst(InvokeInst &I) {
- assert(0 && "Lowerinvoke pass didn't work!");
+ LLVM_UNREACHABLE("Lowerinvoke pass didn't work!");
}
void visitUnwindInst(UnwindInst &I) {
- assert(0 && "Lowerinvoke pass didn't work!");
+ LLVM_UNREACHABLE("Lowerinvoke pass didn't work!");
}
void visitUnreachableInst(UnreachableInst &I);
@@ -921,7 +921,7 @@
Out << ')';
break;
default:
- assert(0 && "Invalid cast opcode");
+ LLVM_UNREACHABLE("Invalid cast opcode");
}
// Print the source type cast
@@ -951,7 +951,7 @@
case Instruction::FPToUI:
break; // These don't need a source cast.
default:
- assert(0 && "Invalid cast opcode");
+ LLVM_UNREACHABLE("Invalid cast opcode");
break;
}
}
@@ -1060,10 +1060,10 @@
case ICmpInst::ICMP_UGT: Out << " > "; break;
case ICmpInst::ICMP_SGE:
case ICmpInst::ICMP_UGE: Out << " >= "; break;
- default: assert(0 && "Illegal ICmp predicate");
+ default: LLVM_UNREACHABLE("Illegal ICmp predicate");
}
break;
- default: assert(0 && "Illegal opcode here!");
+ default: LLVM_UNREACHABLE("Illegal opcode here!");
}
printConstantWithCast(CE->getOperand(1), CE->getOpcode());
if (NeedsClosingParens)
@@ -1081,7 +1081,7 @@
else {
const char* op = 0;
switch (CE->getPredicate()) {
- default: assert(0 && "Illegal FCmp predicate");
+ default: LLVM_UNREACHABLE("Illegal FCmp predicate");
case FCmpInst::FCMP_ORD: op = "ord"; break;
case FCmpInst::FCMP_UNO: op = "uno"; break;
case FCmpInst::FCMP_UEQ: op = "ueq"; break;
@@ -2123,7 +2123,7 @@
<< "}; /* Long double constant */\n";
} else {
- assert(0 && "Unknown float type!");
+ LLVM_UNREACHABLE("Unknown float type!");
}
}
@@ -2740,7 +2740,7 @@
const char* op = 0;
switch (I.getPredicate()) {
- default: assert(0 && "Illegal FCmp predicate");
+ default: LLVM_UNREACHABLE("Illegal FCmp predicate");
case FCmpInst::FCMP_ORD: op = "ord"; break;
case FCmpInst::FCMP_UNO: op = "uno"; break;
case FCmpInst::FCMP_UEQ: op = "ueq"; break;
@@ -2768,7 +2768,7 @@
static const char * getFloatBitCastField(const Type *Ty) {
switch (Ty->getTypeID()) {
- default: assert(0 && "Invalid Type");
+ default: LLVM_UNREACHABLE("Invalid Type");
case Type::FloatTyID: return "Float";
case Type::DoubleTyID: return "Double";
case Type::IntegerTyID: {
@@ -3131,7 +3131,7 @@
Out << ')';
// Multiple GCC builtins multiplex onto this intrinsic.
switch (cast<ConstantInt>(I.getOperand(3))->getZExtValue()) {
- default: assert(0 && "Invalid llvm.x86.sse.cmp!");
+ default: LLVM_UNREACHABLE("Invalid llvm.x86.sse.cmp!");
case 0: Out << "__builtin_ia32_cmpeq"; break;
case 1: Out << "__builtin_ia32_cmplt"; break;
case 2: Out << "__builtin_ia32_cmple"; break;
@@ -3343,7 +3343,7 @@
}
void CWriter::visitMallocInst(MallocInst &I) {
- assert(0 && "lowerallocations pass didn't work!");
+ LLVM_UNREACHABLE("lowerallocations pass didn't work!");
}
void CWriter::visitAllocaInst(AllocaInst &I) {
@@ -3360,7 +3360,7 @@
}
void CWriter::visitFreeInst(FreeInst &I) {
- assert(0 && "lowerallocations pass didn't work!");
+ LLVM_UNREACHABLE("lowerallocations pass didn't work!");
}
void CWriter::printGEPExpression(Value *Ptr, gep_type_iterator I,
Modified: llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -265,7 +265,7 @@
&& "Invalid negated immediate rotate 7-bit argument");
O << -value;
} else {
- assert(0 &&"Invalid/non-immediate rotate amount in printRotateNeg7Imm");
+ LLVM_UNREACHABLE("Invalid/non-immediate rotate amount in printRotateNeg7Imm");
}
}
@@ -276,7 +276,7 @@
&& "Invalid negated immediate rotate 7-bit argument");
O << -value;
} else {
- assert(0 &&"Invalid/non-immediate rotate amount in printRotateNeg7Imm");
+ LLVM_UNREACHABLE("Invalid/non-immediate rotate amount in printRotateNeg7Imm");
}
}
@@ -434,7 +434,7 @@
EmitAlignment(MF.getAlignment(), F);
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage: // Symbols default to internal.
break;
Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Sat Jul 11 15:10:48 2009
@@ -378,7 +378,7 @@
break;
case 'v': // not offsetable
#if 1
- assert(0 && "InlineAsmMemoryOperand 'v' constraint not handled.");
+ LLVM_UNREACHABLE("InlineAsmMemoryOperand 'v' constraint not handled.");
#else
SelectAddrIdxOnly(Op, Op, Op0, Op1);
#endif
Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -875,7 +875,7 @@
}
}
- assert(0 &&
+ LLVM_UNREACHABLE(
"LowerConstantPool: Relocation model other than static"
" not supported.");
return SDValue();
@@ -907,7 +907,7 @@
}
}
- assert(0 &&
+ LLVM_UNREACHABLE(
"LowerJumpTable: Relocation model other than static not supported.");
return SDValue();
}
@@ -1139,7 +1139,7 @@
PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff);
switch (Arg.getValueType().getSimpleVT()) {
- default: assert(0 && "Unexpected ValueType for argument!");
+ default: LLVM_UNREACHABLE("Unexpected ValueType for argument!");
case MVT::i8:
case MVT::i16:
case MVT::i32:
@@ -1271,7 +1271,7 @@
// If the call has results, copy the values out of the ret val registers.
switch (TheCall->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unexpected ret value!");
+ default: LLVM_UNREACHABLE("Unexpected ret value!");
case MVT::Other: break;
case MVT::i32:
if (TheCall->getValueType(1) == MVT::i32) {
@@ -1739,7 +1739,7 @@
} else if (EltVT == MVT::i64 || EltVT == MVT::f64) {
V2EltIdx0 = 2;
} else
- assert(0 && "Unhandled vector type in LowerVECTOR_SHUFFLE");
+ LLVM_UNREACHABLE("Unhandled vector type in LowerVECTOR_SHUFFLE");
for (unsigned i = 0; i != MaxElts; ++i) {
if (SVN->getMaskElt(i) < 0)
@@ -1835,7 +1835,7 @@
// Create a constant vector:
switch (Op.getValueType().getSimpleVT()) {
- default: assert(0 && "Unexpected constant value type in "
+ default: LLVM_UNREACHABLE("Unexpected constant value type in "
"LowerSCALAR_TO_VECTOR");
case MVT::v16i8: n_copies = 16; VT = MVT::i8; break;
case MVT::v8i16: n_copies = 8; VT = MVT::i16; break;
@@ -1854,7 +1854,7 @@
} else {
// Otherwise, copy the value from one register to another:
switch (Op0.getValueType().getSimpleVT()) {
- default: assert(0 && "Unexpected value type in LowerSCALAR_TO_VECTOR");
+ default: LLVM_UNREACHABLE("Unexpected value type in LowerSCALAR_TO_VECTOR");
case MVT::i8:
case MVT::i16:
case MVT::i32:
@@ -1881,13 +1881,13 @@
// sanity checks:
if (VT == MVT::i8 && EltNo >= 16)
- assert(0 && "SPU LowerEXTRACT_VECTOR_ELT: i8 extraction slot > 15");
+ LLVM_UNREACHABLE("SPU LowerEXTRACT_VECTOR_ELT: i8 extraction slot > 15");
else if (VT == MVT::i16 && EltNo >= 8)
- assert(0 && "SPU LowerEXTRACT_VECTOR_ELT: i16 extraction slot > 7");
+ LLVM_UNREACHABLE("SPU LowerEXTRACT_VECTOR_ELT: i16 extraction slot > 7");
else if (VT == MVT::i32 && EltNo >= 4)
- assert(0 && "SPU LowerEXTRACT_VECTOR_ELT: i32 extraction slot > 4");
+ LLVM_UNREACHABLE("SPU LowerEXTRACT_VECTOR_ELT: i32 extraction slot > 4");
else if (VT == MVT::i64 && EltNo >= 2)
- assert(0 && "SPU LowerEXTRACT_VECTOR_ELT: i64 extraction slot > 2");
+ LLVM_UNREACHABLE("SPU LowerEXTRACT_VECTOR_ELT: i64 extraction slot > 2");
if (EltNo == 0 && (VT == MVT::i32 || VT == MVT::i64)) {
// i32 and i64: Element 0 is the preferred slot
@@ -2066,7 +2066,7 @@
assert(Op.getValueType() == MVT::i8);
switch (Opc) {
default:
- assert(0 && "Unhandled i8 math operator");
+ LLVM_UNREACHABLE("Unhandled i8 math operator");
/*NOTREACHED*/
break;
case ISD::ADD: {
Modified: llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp (original)
+++ llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Sat Jul 11 15:10:48 2009
@@ -325,7 +325,7 @@
void CppWriter::printVisibilityType(GlobalValue::VisibilityTypes VisType) {
switch (VisType) {
- default: assert(0 && "Unknown GVar visibility");
+ default: LLVM_UNREACHABLE("Unknown GVar visibility");
case GlobalValue::DefaultVisibility:
Out << "GlobalValue::DefaultVisibility";
break;
@@ -844,7 +844,7 @@
printConstant(CE->getOperand(0));
Out << "Constant* " << constName << " = ConstantExpr::getCast(";
switch (CE->getOpcode()) {
- default: assert(0 && "Invalid cast opcode");
+ default: LLVM_UNREACHABLE("Invalid cast opcode");
case Instruction::Trunc: Out << "Instruction::Trunc"; break;
case Instruction::ZExt: Out << "Instruction::ZExt"; break;
case Instruction::SExt: Out << "Instruction::SExt"; break;
Modified: llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp Sat Jul 11 15:10:48 2009
@@ -17,6 +17,7 @@
#include "llvm/Function.h"
#include "llvm/GlobalVariable.h"
#include "llvm/ADT/StringExtras.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Target/DarwinTargetAsmInfo.h"
#include "llvm/Target/TargetMachine.h"
@@ -151,7 +152,7 @@
ConstDataCoalSection:
MergeableConstSection(cast<GlobalVariable>(GV)));
default:
- assert(0 && "Unsuported section kind for global");
+ LLVM_UNREACHABLE("Unsuported section kind for global");
}
// FIXME: Do we have any extra special weird cases?
@@ -211,6 +212,6 @@
std::string
DarwinTargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
SectionKind::Kind kind) const {
- assert(0 && "Darwin does not use unique sections");
+ LLVM_UNREACHABLE("Darwin does not use unique sections");
return "";
}
Modified: llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp Sat Jul 11 15:10:48 2009
@@ -18,6 +18,7 @@
#include "llvm/GlobalVariable.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/CodeGen/MachineConstantPool.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/ELFTargetAsmInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetData.h"
@@ -74,7 +75,7 @@
if (const Function *F = dyn_cast<Function>(GV)) {
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE("Unknown linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage:
case Function::DLLExportLinkage:
@@ -123,11 +124,11 @@
case SectionKind::ThreadBSS:
return TLSBSSSection;
default:
- assert(0 && "Unsuported section kind for global");
+ LLVM_UNREACHABLE("Unsuported section kind for global");
}
}
} else
- assert(0 && "Unsupported global");
+ LLVM_UNREACHABLE("Unsupported global");
return NULL;
}
Modified: llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp Sat Jul 11 15:10:48 2009
@@ -215,7 +215,7 @@
if(isFP) { // if this is an FP divide, we finish up here and exit early
if(isModulus)
- assert(0 && "Sorry, try another FORTRAN compiler.");
+ LLVM_UNREACHABLE("Sorry, try another FORTRAN compiler.");
SDValue TmpE2, TmpY3, TmpQ0, TmpR0;
@@ -406,7 +406,7 @@
APFloat(+1.0f) : APFloat(+1.0))) {
V = CurDAG->getCopyFromReg(Chain, dl, IA64::F1, MVT::f64);
} else
- assert(0 && "Unexpected FP constant!");
+ LLVM_UNREACHABLE("Unexpected FP constant!");
ReplaceUses(SDValue(N, 0), V);
return 0;
@@ -468,7 +468,7 @@
#ifndef NDEBUG
N->dump(CurDAG);
#endif
- assert(0 && "Cannot load this type!");
+ LLVM_UNREACHABLE("Cannot load this type!");
case MVT::i1: { // this is a bool
Opc = IA64::LD1; // first we load a byte, then compare for != 0
if(N->getValueType(0) == MVT::i1) { // XXX: early exit!
@@ -504,7 +504,7 @@
unsigned Opc;
if (ISD::isNON_TRUNCStore(N)) {
switch (N->getOperand(1).getValueType().getSimpleVT()) {
- default: assert(0 && "unknown type in store");
+ default: LLVM_UNREACHABLE("unknown type in store");
case MVT::i1: { // this is a bool
Opc = IA64::ST1; // we store either 0 or 1 as a byte
// first load zero!
@@ -524,7 +524,7 @@
}
} else { // Truncating store
switch(ST->getMemoryVT().getSimpleVT()) {
- default: assert(0 && "unknown type in truncstore");
+ default: LLVM_UNREACHABLE("unknown type in truncstore");
case MVT::i8: Opc = IA64::ST1; break;
case MVT::i16: Opc = IA64::ST2; break;
case MVT::i32: Opc = IA64::ST4; break;
Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -194,7 +194,7 @@
switch (getValueType(I->getType()).getSimpleVT()) {
default:
- assert(0 && "ERROR in LowerArgs: can't lower this type of arg.\n");
+ LLVM_UNREACHABLE("ERROR in LowerArgs: can't lower this type of arg.\n");
case MVT::f32:
// fixme? (well, will need to for weird FP structy stuff,
// see intel ABI docs)
@@ -298,7 +298,7 @@
// Finally, inform the code generator which regs we return values in.
// (see the ISD::RET: case in the instruction selector)
switch (getValueType(F.getReturnType()).getSimpleVT()) {
- default: assert(0 && "i have no idea where to return this type!");
+ default: LLVM_UNREACHABLE("i have no idea where to return this type!");
case MVT::isVoid: break;
case MVT::i1:
case MVT::i8:
@@ -362,7 +362,7 @@
SDValue ValToStore(0, 0), ValToConvert(0, 0);
unsigned ObjSize=8;
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "unexpected argument type!");
+ default: LLVM_UNREACHABLE("unexpected argument type!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
@@ -493,7 +493,7 @@
if (InFlag.getNode())
CallOperands.push_back(InFlag);
else
- assert(0 && "this should never happen!\n");
+ LLVM_UNREACHABLE("this should never happen!\n");
// to make way for a hack:
Chain = DAG.getNode(IA64ISD::BRCALL, dl, NodeTys,
@@ -516,7 +516,7 @@
SDValue RetVal;
if (RetTyVT != MVT::isVoid) {
switch (RetTyVT.getSimpleVT()) {
- default: assert(0 && "Unknown value type to return!");
+ default: LLVM_UNREACHABLE("Unknown value type to return!");
case MVT::i1: { // bools are just like other integers (returned in r8)
// we *could* fall through to the truncate below, but this saves a
// few redundant predicate ops
@@ -573,9 +573,9 @@
LowerOperation(SDValue Op, SelectionDAG &DAG) {
DebugLoc dl = Op.getDebugLoc();
switch (Op.getOpcode()) {
- default: assert(0 && "Should not custom lower this!");
+ default: LLVM_UNREACHABLE("Should not custom lower this!");
case ISD::GlobalTLSAddress:
- assert(0 && "TLS not implemented for IA64.");
+ LLVM_UNREACHABLE("TLS not implemented for IA64.");
case ISD::RET: {
SDValue AR_PFSVal, Copy;
Modified: llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp Sat Jul 11 15:10:48 2009
@@ -16,6 +16,7 @@
#include "IA64InstrBuilder.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/ErrorHandling.h"
#include "IA64GenInstrInfo.inc"
using namespace llvm;
@@ -111,8 +112,8 @@
BuildMI(MBB, MI, DL, get(IA64::ST8))
.addFrameIndex(FrameIdx)
.addReg(IA64::r2);
- } else assert(0 &&
- "sorry, I don't know how to store this sort of reg in the stack\n");
+ } else
+ LLVM_UNREACHABLE("sorry, I don't know how to store this sort of reg in the stack");
}
void IA64InstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
@@ -128,7 +129,7 @@
} else if (RC == IA64::PRRegisterClass) {
Opc = IA64::ST1;
} else {
- assert(0 &&
+ LLVM_UNREACHABLE(
"sorry, I don't know how to store this sort of reg\n");
}
@@ -163,7 +164,7 @@
.addReg(IA64::r2)
.addReg(IA64::r0);
} else {
- assert(0 &&
+ LLVM_UNREACHABLE(
"sorry, I don't know how to load this sort of reg from the stack\n");
}
}
@@ -180,7 +181,7 @@
} else if (RC == IA64::PRRegisterClass) {
Opc = IA64::LD1;
} else {
- assert(0 &&
+ LLVM_UNREACHABLE(
"sorry, I don't know how to load this sort of reg\n");
}
Modified: llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -25,6 +25,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineLocation.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
@@ -292,7 +293,7 @@
}
unsigned IA64RegisterInfo::getRARegister() const {
- assert(0 && "What is the return address register");
+ LLVM_UNREACHABLE("What is the return address register");
return 0;
}
@@ -301,17 +302,17 @@
}
unsigned IA64RegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned IA64RegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
int IA64RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "What is the dwarf register number");
+ LLVM_UNREACHABLE("What is the dwarf register number");
return -1;
}
Modified: llvm/trunk/lib/Target/MSIL/MSILWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSIL/MSILWriter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSIL/MSILWriter.cpp (original)
+++ llvm/trunk/lib/Target/MSIL/MSILWriter.cpp Sat Jul 11 15:10:48 2009
@@ -19,6 +19,7 @@
#include "llvm/TypeSymbolTable.h"
#include "llvm/Analysis/ConstantsScanner.h"
#include "llvm/Support/CallSite.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/InstVisitor.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Transforms/Scalar.h"
@@ -273,7 +274,7 @@
return "modopt([mscorlib]System.Runtime.CompilerServices.CallConvStdcall) ";
default:
cerr << "CallingConvID = " << CallingConvID << '\n';
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
}
return ""; // Not reached
}
@@ -319,7 +320,7 @@
return "float64 ";
default:
cerr << "Type = " << *Ty << '\n';
- assert(0 && "Invalid primitive type");
+ LLVM_UNREACHABLE("Invalid primitive type");
}
return ""; // Not reached
}
@@ -347,7 +348,7 @@
return "valuetype '"+getArrayTypeName(Ty->getTypeID(),Ty)+"' ";
default:
cerr << "Type = " << *Ty << '\n';
- assert(0 && "Invalid type in getTypeName()");
+ LLVM_UNREACHABLE("Invalid type in getTypeName()");
}
return ""; // Not reached
}
@@ -391,7 +392,7 @@
return "i"+utostr(TD->getTypeAllocSize(Ty));
default:
cerr << "TypeID = " << Ty->getTypeID() << '\n';
- assert(0 && "Invalid type in TypeToPostfix()");
+ LLVM_UNREACHABLE("Invalid type in TypeToPostfix()");
}
return ""; // Not reached
}
@@ -406,7 +407,7 @@
printSimpleInstruction("conv.u8");
break;
default:
- assert(0 && "Module use not supporting pointer size");
+ LLVM_UNREACHABLE("Module use not supporting pointer size");
}
}
@@ -418,14 +419,14 @@
// FIXME: Need overflow test?
if (!isUInt32(N)) {
cerr << "Value = " << utostr(N) << '\n';
- assert(0 && "32-bit pointer overflowed");
+ LLVM_UNREACHABLE("32-bit pointer overflowed");
}
break;
case Module::Pointer64:
printSimpleInstruction("ldc.i8",utostr(N).c_str());
break;
default:
- assert(0 && "Module use not supporting pointer size");
+ LLVM_UNREACHABLE("Module use not supporting pointer size");
}
}
@@ -461,7 +462,7 @@
printPtrLoad(0);
} else {
cerr << "Constant = " << *C << '\n';
- assert(0 && "Invalid constant value");
+ LLVM_UNREACHABLE("Invalid constant value");
}
Out << '\n';
}
@@ -510,7 +511,7 @@
break;
default:
cerr << "Value = " << *V << '\n';
- assert(0 && "Invalid value location");
+ LLVM_UNREACHABLE("Invalid value location");
}
}
@@ -525,7 +526,7 @@
break;
default:
cerr << "Value = " << *V << '\n';
- assert(0 && "Invalid value location");
+ LLVM_UNREACHABLE("Invalid value location");
}
}
@@ -680,7 +681,7 @@
break;
default:
cerr << "Opcode = " << Op << '\n';
- assert(0 && "Invalid conversion instruction");
+ LLVM_UNREACHABLE("Invalid conversion instruction");
}
}
@@ -771,7 +772,7 @@
Name = getConvModopt(Invoke->getCallingConv());
else {
cerr << "Instruction = " << Inst->getName() << '\n';
- assert(0 && "Need \"Invoke\" or \"Call\" instruction only");
+ LLVM_UNREACHABLE("Need \"Invoke\" or \"Call\" instruction only");
}
if (const Function* F = dyn_cast<Function>(FnVal)) {
// Direct call.
@@ -819,7 +820,7 @@
break;
default:
cerr << "Intrinsic ID = " << Inst->getIntrinsicID() << '\n';
- assert(0 && "Invalid intrinsic function");
+ LLVM_UNREACHABLE("Invalid intrinsic function");
}
}
@@ -882,7 +883,7 @@
break;
default:
cerr << "Predicate = " << Predicate << '\n';
- assert(0 && "Invalid icmp predicate");
+ LLVM_UNREACHABLE("Invalid icmp predicate");
}
}
@@ -976,7 +977,7 @@
printSimpleInstruction("or");
break;
default:
- assert(0 && "Illegal FCmp predicate");
+ LLVM_UNREACHABLE("Illegal FCmp predicate");
}
}
@@ -1169,10 +1170,10 @@
printAllocaInstruction(cast<AllocaInst>(Inst));
break;
case Instruction::Malloc:
- assert(0 && "LowerAllocationsPass used");
+ LLVM_UNREACHABLE("LowerAllocationsPass used");
break;
case Instruction::Free:
- assert(0 && "LowerAllocationsPass used");
+ LLVM_UNREACHABLE("LowerAllocationsPass used");
break;
case Instruction::Unreachable:
printSimpleInstruction("ldstr", "\"Unreachable instruction\"");
@@ -1185,7 +1186,7 @@
break;
default:
cerr << "Instruction = " << Inst->getName() << '\n';
- assert(0 && "Unsupported instruction");
+ LLVM_UNREACHABLE("Unsupported instruction");
}
}
@@ -1373,7 +1374,7 @@
break;
default:
cerr << "Expression = " << *CE << "\n";
- assert(0 && "Invalid constant expression");
+ LLVM_UNREACHABLE("Invalid constant expression");
}
}
@@ -1407,7 +1408,7 @@
printSimpleInstruction(postfix.c_str());
} else {
cerr << "Constant = " << *I->constant << '\n';
- assert(0 && "Invalid static initializer");
+ LLVM_UNREACHABLE("Invalid static initializer");
}
}
}
@@ -1471,7 +1472,7 @@
return N;
default:
cerr << "Bits = " << N << '\n';
- assert(0 && "Unsupported integer width");
+ LLVM_UNREACHABLE("Unsupported integer width");
}
return 0; // Not reached
}
@@ -1528,12 +1529,12 @@
// Null pointer initialization
if (TySize==4) Out << "int32 (0)";
else if (TySize==8) Out << "int64 (0)";
- else assert(0 && "Invalid pointer size");
+ else LLVM_UNREACHABLE("Invalid pointer size");
}
break;
default:
cerr << "TypeID = " << Ty->getTypeID() << '\n';
- assert(0 && "Invalid type in printStaticConstant()");
+ LLVM_UNREACHABLE("Invalid type in printStaticConstant()");
}
// Increase offset.
Offset += TySize;
@@ -1556,7 +1557,7 @@
break;
default:
cerr << "Type = " << *C << "\n";
- assert(0 && "Invalid constant type");
+ LLVM_UNREACHABLE("Invalid constant type");
}
// Print initializer
std::string label = Name;
Modified: llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -31,6 +31,7 @@
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
@@ -99,7 +100,7 @@
EmitAlignment(FnAlign, F);
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE("Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
case Function::PrivateLinkage:
break;
@@ -161,7 +162,7 @@
if (printInstruction(MI))
return;
- assert(0 && "Should not happen");
+ LLVM_UNREACHABLE("Should not happen");
}
void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
@@ -206,7 +207,7 @@
return;
}
default:
- assert(0 && "Not implemented yet!");
+ LLVM_UNREACHABLE("Not implemented yet!");
}
}
@@ -230,7 +231,7 @@
printOperand(MI, OpNum);
}
} else
- assert(0 && "Unsupported memory operand");
+ LLVM_UNREACHABLE("Unsupported memory operand");
}
void MSP430AsmPrinter::printCCOperand(const MachineInstr *MI, int OpNum) {
@@ -238,7 +239,7 @@
switch (CC) {
default:
- assert(0 && "Unsupported CC code");
+ LLVM_UNREACHABLE("Unsupported CC code");
break;
case MSP430::COND_E:
O << "eq";
Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -123,7 +123,7 @@
case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG);
default:
- assert(0 && "unimplemented operand");
+ LLVM_UNREACHABLE("unimplemented operand");
return SDValue();
}
}
@@ -144,7 +144,7 @@
unsigned CC = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
switch (CC) {
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::C:
case CallingConv::Fast:
return LowerCCCArguments(Op, DAG);
@@ -156,7 +156,7 @@
unsigned CallingConv = TheCall->getCallingConv();
switch (CallingConv) {
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::Fast:
case CallingConv::C:
return LowerCCCCallTo(Op, DAG, CallingConv);
@@ -331,7 +331,7 @@
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
@@ -516,7 +516,7 @@
// FIXME: Handle jump negative someday
TargetCC = MSP430::COND_INVALID;
switch (CC) {
- default: assert(0 && "Invalid integer condition!");
+ default: LLVM_UNREACHABLE("Invalid integer condition!");
case ISD::SETEQ:
TargetCC = MSP430::COND_E; // aka COND_Z
break;
Modified: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp Sat Jul 11 15:10:48 2009
@@ -21,6 +21,7 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
@@ -44,7 +45,7 @@
.addFrameIndex(FrameIdx).addImm(0)
.addReg(SrcReg, getKillRegState(isKill));
else
- assert(0 && "Cannot store this register to stack slot!");
+ LLVM_UNREACHABLE("Cannot store this register to stack slot!");
}
void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
@@ -61,7 +62,7 @@
BuildMI(MBB, MI, DL, get(MSP430::MOV8rm))
.addReg(DestReg).addFrameIndex(FrameIdx).addImm(0);
else
- assert(0 && "Cannot store this register to stack slot!");
+ LLVM_UNREACHABLE("Cannot store this register to stack slot!");
}
bool MSP430InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
@@ -171,7 +172,7 @@
// Conditional branch.
unsigned Count = 0;
- assert(0 && "Implement conditional branches!");
+ LLVM_UNREACHABLE("Implement conditional branches!");
return Count;
}
Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/BitVector.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
@@ -291,7 +292,7 @@
switch (RetOpcode) {
case MSP430::RET: break; // These are ok
default:
- assert(0 && "Can only insert epilog into returning blocks");
+ LLVM_UNREACHABLE("Can only insert epilog into returning blocks");
}
// Get the number of bytes to allocate from the FrameInfo
@@ -327,7 +328,7 @@
// mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes);
if (MFI->hasVarSizedObjects()) {
- assert(0 && "Not implemented yet!");
+ LLVM_UNREACHABLE("Not implemented yet!");
} else {
// adjust stack pointer back: SPW += numbytes
if (NumBytes) {
@@ -349,7 +350,7 @@
}
int MSP430RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "Not implemented yet!");
+ LLVM_UNREACHABLE("Not implemented yet!");
return 0;
}
Modified: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -216,7 +216,7 @@
default: break;
}
- assert(0 && "Unknown Mips ABI");
+ LLVM_UNREACHABLE( "Unknown Mips ABI");
return NULL;
}
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -31,6 +31,7 @@
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
const char *MipsTargetLowering::
@@ -247,7 +248,7 @@
static unsigned FPBranchCodeToOpc(Mips::FPBranchCode BC) {
switch(BC) {
default:
- assert(0 && "Unknown branch code");
+ LLVM_UNREACHABLE("Unknown branch code");
case Mips::BRANCH_T : return Mips::BC1T;
case Mips::BRANCH_F : return Mips::BC1F;
case Mips::BRANCH_TL : return Mips::BC1TL;
@@ -257,7 +258,7 @@
static Mips::CondCode FPCondCCodeToFCC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown fp condition code!");
+ default: LLVM_UNREACHABLE("Unknown fp condition code!");
case ISD::SETEQ:
case ISD::SETOEQ: return Mips::FCOND_EQ;
case ISD::SETUNE: return Mips::FCOND_OGL;
@@ -541,14 +542,14 @@
return DAG.getNode(ISD::ADD, dl, MVT::i32, ResNode, Lo);
}
- assert(0 && "Dont know how to handle GlobalAddress");
+ LLVM_UNREACHABLE("Dont know how to handle GlobalAddress");
return SDValue(0,0);
}
SDValue MipsTargetLowering::
LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG)
{
- assert(0 && "TLS not implemented for MIPS.");
+ LLVM_UNREACHABLE("TLS not implemented for MIPS.");
return SDValue(); // Not reached
}
@@ -752,7 +753,7 @@
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full:
if (Subtarget->isABI_O32() && VA.isRegLoc()) {
if (VA.getValVT() == MVT::f32 && VA.getLocVT() == MVT::i32)
@@ -977,7 +978,7 @@
if (!Subtarget->isSingleFloat())
RC = Mips::AFGR64RegisterClass;
} else
- assert(0 && "RegVT not supported by FORMAL_ARGUMENTS Lowering");
+ LLVM_UNREACHABLE("RegVT not supported by FORMAL_ARGUMENTS Lowering");
// Transform the arguments stored on
// physical registers into virtual ones
@@ -1139,7 +1140,7 @@
unsigned Reg = MipsFI->getSRetReturnReg();
if (!Reg)
- assert(0 && "sret virtual register not created in the entry block");
+ LLVM_UNREACHABLE("sret virtual register not created in the entry block");
SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy());
Chain = DAG.getCopyToReg(Chain, dl, Mips::V0, Val, Flag);
Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Sat Jul 11 15:10:48 2009
@@ -17,6 +17,7 @@
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "MipsGenInstrInfo.inc"
using namespace llvm;
@@ -372,7 +373,7 @@
unsigned Mips::GetCondBranchFromCond(Mips::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case Mips::COND_E : return Mips::BEQ;
case Mips::COND_NE : return Mips::BNE;
case Mips::COND_GZ : return Mips::BGTZ;
@@ -421,7 +422,7 @@
Mips::CondCode Mips::GetOppositeBranchCondition(Mips::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case Mips::COND_E : return Mips::COND_NE;
case Mips::COND_NE : return Mips::COND_E;
case Mips::COND_GZ : return Mips::COND_LEZ;
Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.h Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
#define MIPSINSTRUCTIONINFO_H
#include "Mips.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "MipsRegisterInfo.h"
@@ -92,7 +93,7 @@
inline static const char *MipsFCCToString(Mips::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case FCOND_F:
case FCOND_T: return "f";
case FCOND_UN:
Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -31,6 +31,7 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
@@ -79,7 +80,7 @@
case Mips::SP : case Mips::F29: return 29;
case Mips::FP : case Mips::F30: case Mips::D15: return 30;
case Mips::RA : case Mips::F31: return 31;
- default: assert(0 && "Unknown register number!");
+ default: LLVM_UNREACHABLE("Unknown register number!");
}
return 0; // Not reached
}
@@ -515,19 +516,19 @@
unsigned MipsRegisterInfo::
getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned MipsRegisterInfo::
getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
int MipsRegisterInfo::
getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "What is the dwarf register number");
+ LLVM_UNREACHABLE("What is the dwarf register number");
return -1;
}
Modified: llvm/trunk/lib/Target/PIC16/PIC16.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16.h (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16.h Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
#ifndef LLVM_TARGET_PIC16_H
#define LLVM_TARGET_PIC16_H
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <iosfwd>
#include <cassert>
@@ -307,7 +308,7 @@
inline static const char *PIC16CondCodeToString(PIC16CC::CondCodes CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case PIC16CC::NE: return "ne";
case PIC16CC::EQ: return "eq";
case PIC16CC::LT: return "lt";
@@ -323,7 +324,7 @@
inline static bool isSignedComparison(PIC16CC::CondCodes CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case PIC16CC::NE:
case PIC16CC::EQ:
case PIC16CC::LT:
Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -21,6 +21,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/Mangler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/CodeGen/DwarfWriter.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
@@ -127,8 +128,8 @@
if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
else
- assert(0 && "not implemented");
- return;
+ LLVM_UNREACHABLE("not implemented");
+ return;
case MachineOperand::MO_Immediate:
O << (int)MO.getImm();
@@ -154,7 +155,7 @@
return;
default:
- assert(0 && " Operand type not supported.");
+ LLVM_UNREACHABLE(" Operand type not supported.");
}
}
Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -1697,7 +1697,7 @@
static PIC16CC::CondCodes IntCCToPIC16CC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code!");
+ default: LLVM_UNREACHABLE("Unknown condition code!");
case ISD::SETNE: return PIC16CC::NE;
case ISD::SETEQ: return PIC16CC::EQ;
case ISD::SETGT: return PIC16CC::GT;
Modified: llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.cpp Sat Jul 11 15:10:48 2009
@@ -20,6 +20,7 @@
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cstdio>
@@ -104,7 +105,7 @@
.addImm(1); // Emit banksel for it.
}
else
- assert(0 && "Can't store this register to stack slot");
+ LLVM_UNREACHABLE("Can't store this register to stack slot");
}
void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
@@ -144,7 +145,7 @@
.addImm(1); // Emit banksel for it.
}
else
- assert(0 && "Can't load this register from stack slot");
+ LLVM_UNREACHABLE("Can't load this register from stack slot");
}
bool PIC16InstrInfo::copyRegToReg (MachineBasicBlock &MBB,
Modified: llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -16,7 +16,7 @@
#include "PIC16.h"
#include "PIC16RegisterInfo.h"
#include "llvm/ADT/BitVector.h"
-
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
@@ -65,17 +65,17 @@
int PIC16RegisterInfo::
getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "Not keeping track of debug information yet!!");
+ LLVM_UNREACHABLE("Not keeping track of debug information yet!!");
return -1;
}
unsigned PIC16RegisterInfo::getFrameRegister(MachineFunction &MF) const {
- assert(0 && "PIC16 Does not have any frame register");
+ LLVM_UNREACHABLE("PIC16 Does not have any frame register");
return 0;
}
unsigned PIC16RegisterInfo::getRARegister() const {
- assert(0 && "PIC16 Does not have any return address register");
+ LLVM_UNREACHABLE("PIC16 Does not have any return address register");
return 0;
}
Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -571,7 +571,7 @@
SwitchToSection(TAI->SectionForGlobal(F));
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage: // Symbols default to internal.
break;
@@ -748,7 +748,7 @@
SwitchToSection(TAI->SectionForGlobal(F));
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage: // Symbols default to internal.
break;
Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Sat Jul 11 15:10:48 2009
@@ -181,7 +181,7 @@
assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
}
switch (MI.getOpcode()) {
- default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
+ default: MI.dump(); LLVM_UNREACHABLE("Unknown instruction for relocation!");
case PPC::LIS:
case PPC::LIS8:
case PPC::ADDIS:
Modified: llvm/trunk/lib/Target/PowerPC/PPCHazardRecognizers.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCHazardRecognizers.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCHazardRecognizers.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCHazardRecognizers.cpp Sat Jul 11 15:10:48 2009
@@ -17,6 +17,7 @@
#include "PPCInstrInfo.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
@@ -141,7 +142,7 @@
return Hazard;
switch (InstrType) {
- default: assert(0 && "Unknown instruction type!");
+ default: LLVM_UNREACHABLE("Unknown instruction type!");
case PPCII::PPC970_FXU:
case PPCII::PPC970_LSU:
case PPCII::PPC970_FPU:
@@ -167,7 +168,7 @@
if (isLoad && NumStores) {
unsigned LoadSize;
switch (Opcode) {
- default: assert(0 && "Unknown load!");
+ default: LLVM_UNREACHABLE("Unknown load!");
case PPC::LBZ: case PPC::LBZU:
case PPC::LBZX:
case PPC::LBZ8: case PPC::LBZU8:
@@ -235,7 +236,7 @@
if (isStore) {
unsigned ThisStoreSize;
switch (Opcode) {
- default: assert(0 && "Unknown store instruction!");
+ default: LLVM_UNREACHABLE("Unknown store instruction!");
case PPC::STB: case PPC::STB8:
case PPC::STBU: case PPC::STBU8:
case PPC::STBX: case PPC::STBX8:
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Sat Jul 11 15:10:48 2009
@@ -653,7 +653,7 @@
case ISD::SETOGE:
case ISD::SETOLE:
case ISD::SETONE:
- assert(0 && "Invalid branch code: should be expanded by legalize");
+ LLVM_UNREACHABLE("Invalid branch code: should be expanded by legalize");
// These are invalid for floating point. Assume integer.
case ISD::SETULT: return 0;
case ISD::SETUGT: return 1;
@@ -941,7 +941,7 @@
// Handle PPC32 integer and normal FP loads.
assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load");
switch (LoadedVT.getSimpleVT()) {
- default: assert(0 && "Invalid PPC load type!");
+ default: LLVM_UNREACHABLE("Invalid PPC load type!");
case MVT::f64: Opcode = PPC::LFDU; break;
case MVT::f32: Opcode = PPC::LFSU; break;
case MVT::i32: Opcode = PPC::LWZU; break;
@@ -953,7 +953,7 @@
assert(LD->getValueType(0) == MVT::i64 && "Unknown load result type!");
assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load");
switch (LoadedVT.getSimpleVT()) {
- default: assert(0 && "Invalid PPC load type!");
+ default: LLVM_UNREACHABLE("Invalid PPC load type!");
case MVT::i64: Opcode = PPC::LDU; break;
case MVT::i32: Opcode = PPC::LWZU8; break;
case MVT::i16: Opcode = isSExt ? PPC::LHAU8 : PPC::LHZU8; break;
@@ -970,7 +970,7 @@
PPCLowering.getPointerTy(),
MVT::Other, Ops, 3);
} else {
- assert(0 && "R+R preindex loads not supported yet!");
+ LLVM_UNREACHABLE("R+R preindex loads not supported yet!");
}
}
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -1156,7 +1156,7 @@
SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
SelectionDAG &DAG) {
- assert(0 && "TLS not implemented for PPC.");
+ LLVM_UNREACHABLE("TLS not implemented for PPC.");
return SDValue(); // Not reached
}
@@ -1251,7 +1251,7 @@
unsigned VarArgsNumFPR,
const PPCSubtarget &Subtarget) {
- assert(0 && "VAARG not yet implemented for the SVR4 ABI!");
+ LLVM_UNREACHABLE("VAARG not yet implemented for the SVR4 ABI!");
return SDValue(); // Not reached
}
@@ -1544,7 +1544,7 @@
switch (ValVT.getSimpleVT()) {
default:
- assert(0 && "ValVT not supported by FORMAL_ARGUMENTS Lowering");
+ LLVM_UNREACHABLE("ValVT not supported by FORMAL_ARGUMENTS Lowering");
case MVT::i32:
RC = PPC::GPRCRegisterClass;
break;
@@ -1785,7 +1785,7 @@
}
switch(ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i32:
case MVT::f32:
VecArgOffset += isPPC64 ? 8 : 4;
@@ -1892,7 +1892,7 @@
}
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i32:
if (!isPPC64) {
if (GPR_idx != Num_GPR_Regs) {
@@ -2902,7 +2902,7 @@
}
switch (Arg.getValueType().getSimpleVT()) {
- default: assert(0 && "Unexpected ValueType for argument!");
+ default: LLVM_UNREACHABLE("Unexpected ValueType for argument!");
case MVT::i32:
case MVT::i64:
if (GPR_idx != NumGPRs) {
@@ -3309,7 +3309,7 @@
SDValue Tmp;
switch (Op.getValueType().getSimpleVT()) {
- default: assert(0 && "Unhandled FP_TO_INT type in custom expander!");
+ default: LLVM_UNREACHABLE("Unhandled FP_TO_INT type in custom expander!");
case MVT::i32:
Tmp = DAG.getNode(Op.getOpcode()==ISD::FP_TO_SINT ? PPCISD::FCTIWZ :
PPCISD::FCTIDZ,
@@ -3795,7 +3795,7 @@
int ShufIdxs[16];
switch (OpNum) {
- default: assert(0 && "Unknown i32 permute!");
+ default: LLVM_UNREACHABLE("Unknown i32 permute!");
case OP_VMRGHW:
ShufIdxs[ 0] = 0; ShufIdxs[ 1] = 1; ShufIdxs[ 2] = 2; ShufIdxs[ 3] = 3;
ShufIdxs[ 4] = 16; ShufIdxs[ 5] = 17; ShufIdxs[ 6] = 18; ShufIdxs[ 7] = 19;
@@ -4155,7 +4155,7 @@
///
SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
- default: assert(0 && "Wasn't expecting to be able to lower this!");
+ default: LLVM_UNREACHABLE("Wasn't expecting to be able to lower this!");
case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
@@ -4817,7 +4817,7 @@
BB = exitMBB;
BuildMI(BB, dl, TII->get(PPC::SRW),dest).addReg(TmpReg).addReg(ShiftReg);
} else {
- assert(0 && "Unexpected instr type to insert");
+ LLVM_UNREACHABLE("Unexpected instr type to insert");
}
F->DeleteMachineInstr(MI); // The pseudo instruction is gone now.
@@ -5192,7 +5192,7 @@
if (!CST) return; // Must be an immediate to match.
unsigned Value = CST->getZExtValue();
switch (Letter) {
- default: assert(0 && "Unknown constraint letter!");
+ default: LLVM_UNREACHABLE("Unknown constraint letter!");
case 'I': // "I" is a signed 16-bit constant.
if ((short)Value == (int)Value)
Result = DAG.getTargetConstant(Value, Op.getValueType());
Modified: llvm/trunk/lib/Target/PowerPC/PPCJITInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCJITInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCJITInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCJITInfo.cpp Sat Jul 11 15:10:48 2009
@@ -383,7 +383,7 @@
unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
switch ((PPC::RelocationType)MR->getRelocationType()) {
- default: assert(0 && "Unknown relocation type!");
+ default: LLVM_UNREACHABLE("Unknown relocation type!");
case PPC::reloc_pcrel_bx:
// PC-relative relocation for b and bl instructions.
ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
Modified: llvm/trunk/lib/Target/PowerPC/PPCMachOWriterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMachOWriterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCMachOWriterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCMachOWriterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -16,6 +16,7 @@
#include "PPCTargetMachine.h"
#include "llvm/CodeGen/MachORelocation.h"
#include "llvm/Support/OutputBuffer.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cstdio>
using namespace llvm;
@@ -46,9 +47,9 @@
Addr = (uintptr_t)MR.getResultPointer() + ToAddr;
switch ((PPC::RelocationType)MR.getRelocationType()) {
- default: assert(0 && "Unknown PPC relocation type!");
+ default: LLVM_UNREACHABLE("Unknown PPC relocation type!");
case PPC::reloc_absolute_low_ix:
- assert(0 && "Unhandled PPC relocation type!");
+ LLVM_UNREACHABLE("Unhandled PPC relocation type!");
break;
case PPC::reloc_vanilla:
{
Modified: llvm/trunk/lib/Target/PowerPC/PPCPredicates.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCPredicates.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCPredicates.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCPredicates.cpp Sat Jul 11 15:10:48 2009
@@ -12,12 +12,13 @@
//===----------------------------------------------------------------------===//
#include "PPCPredicates.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
using namespace llvm;
PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) {
switch (Opcode) {
- default: assert(0 && "Unknown PPC branch opcode!");
+ default: LLVM_UNREACHABLE("Unknown PPC branch opcode!");
case PPC::PRED_EQ: return PPC::PRED_NE;
case PPC::PRED_NE: return PPC::PRED_EQ;
case PPC::PRED_LT: return PPC::PRED_GE;
Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -1065,7 +1065,7 @@
MinVR = Reg;
}
} else {
- assert(0 && "Unknown RegisterClass!");
+ LLVM_UNREACHABLE("Unknown RegisterClass!");
}
}
Modified: llvm/trunk/lib/Target/Sparc/FPMover.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/FPMover.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/FPMover.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/FPMover.cpp Sat Jul 11 15:10:48 2009
@@ -20,6 +20,7 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
STATISTIC(NumFpDs , "Number of instructions translated");
@@ -75,7 +76,7 @@
OddReg = OddHalvesOfPairs[i];
return;
}
- assert(0 && "Can't find reg");
+ LLVM_UNREACHABLE("Can't find reg");
}
/// runOnMachineBasicBlock - Fixup FpMOVD instructions in this MBB.
@@ -108,7 +109,7 @@
else if (MI->getOpcode() == SP::FpABSD)
MI->setDesc(TII->get(SP::FABSS));
else
- assert(0 && "Unknown opcode!");
+ LLVM_UNREACHABLE("Unknown opcode!");
MI->getOperand(0).setReg(EvenDestReg);
MI->getOperand(1).setReg(EvenSrcReg);
Modified: llvm/trunk/lib/Target/Sparc/Sparc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/Sparc.h?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/Sparc.h (original)
+++ llvm/trunk/lib/Target/Sparc/Sparc.h Sat Jul 11 15:10:48 2009
@@ -15,6 +15,7 @@
#ifndef TARGET_SPARC_H
#define TARGET_SPARC_H
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <cassert>
@@ -83,7 +84,7 @@
inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case SPCC::ICC_NE: return "ne";
case SPCC::ICC_E: return "e";
case SPCC::ICC_G: return "g";
Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -22,6 +22,7 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/ADT/VectorExtras.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
@@ -98,7 +99,7 @@
MVT ObjectVT = getValueType(I->getType());
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
@@ -251,7 +252,7 @@
unsigned ArgsSize = 0;
for (unsigned i = 0, e = TheCall->getNumArgs(); i != e; ++i) {
switch (TheCall->getArg(i).getValueType().getSimpleVT()) {
- default: assert(0 && "Unknown value type!");
+ default: LLVM_UNREACHABLE("Unknown value type!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
@@ -289,7 +290,7 @@
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, VA.getLocVT(), Arg);
@@ -331,7 +332,7 @@
SDValue ValToStore(0, 0);
unsigned ObjSize;
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i32:
ObjSize = 4;
@@ -497,7 +498,7 @@
/// condition.
static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ISD::SETEQ: return SPCC::ICC_E;
case ISD::SETNE: return SPCC::ICC_NE;
case ISD::SETLT: return SPCC::ICC_L;
@@ -515,7 +516,7 @@
/// FCC condition.
static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown fp condition code!");
+ default: LLVM_UNREACHABLE("Unknown fp condition code!");
case ISD::SETEQ:
case ISD::SETOEQ: return SPCC::FCC_E;
case ISD::SETNE:
@@ -901,12 +902,12 @@
SDValue SparcTargetLowering::
LowerOperation(SDValue Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
- default: assert(0 && "Should not custom lower this!");
+ default: LLVM_UNREACHABLE("Should not custom lower this!");
// Frame & Return address. Currently unimplemented
case ISD::RETURNADDR: return SDValue();
case ISD::FRAMEADDR: return SDValue();
case ISD::GlobalTLSAddress:
- assert(0 && "TLS not implemented for Sparc.");
+ LLVM_UNREACHABLE("TLS not implemented for Sparc.");
case ISD::GlobalAddress: return LowerGLOBALADDRESS(Op, DAG);
case ISD::ConstantPool: return LowerCONSTANTPOOL(Op, DAG);
case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG);
@@ -930,7 +931,7 @@
DebugLoc dl = MI->getDebugLoc();
// Figure out the conditional branch opcode to use for this select_cc.
switch (MI->getOpcode()) {
- default: assert(0 && "Unknown SELECT_CC!");
+ default: LLVM_UNREACHABLE("Unknown SELECT_CC!");
case SP::SELECT_CC_Int_ICC:
case SP::SELECT_CC_FP_ICC:
case SP::SELECT_CC_DFP_ICC:
Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp Sat Jul 11 15:10:48 2009
@@ -17,6 +17,7 @@
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/Support/ErrorHandling.h"
#include "SparcGenInstrInfo.inc"
using namespace llvm;
@@ -160,7 +161,7 @@
BuildMI(MBB, I, DL, get(SP::STDFri)).addFrameIndex(FI).addImm(0)
.addReg(SrcReg, getKillRegState(isKill));
else
- assert(0 && "Can't store this register to stack slot");
+ LLVM_UNREACHABLE("Can't store this register to stack slot");
}
void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
@@ -177,7 +178,7 @@
else if (RC == SP::DFPRegsRegisterClass)
Opc = SP::STDFri;
else
- assert(0 && "Can't load this register");
+ LLVM_UNREACHABLE("Can't load this register");
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc));
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
MIB.addOperand(Addr[i]);
@@ -200,7 +201,7 @@
else if (RC == SP::DFPRegsRegisterClass)
BuildMI(MBB, I, DL, get(SP::LDDFri), DestReg).addFrameIndex(FI).addImm(0);
else
- assert(0 && "Can't load this register from stack slot");
+ LLVM_UNREACHABLE("Can't load this register from stack slot");
}
void SparcInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
@@ -215,7 +216,7 @@
else if (RC == SP::DFPRegsRegisterClass)
Opc = SP::LDDFri;
else
- assert(0 && "Can't load this register");
+ LLVM_UNREACHABLE("Can't load this register");
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
Modified: llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -18,6 +18,7 @@
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineLocation.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Type.h"
#include "llvm/ADT/BitVector.h"
@@ -168,27 +169,27 @@
}
unsigned SparcRegisterInfo::getRARegister() const {
- assert(0 && "What is the return address register");
+ LLVM_UNREACHABLE("What is the return address register");
return 0;
}
unsigned SparcRegisterInfo::getFrameRegister(MachineFunction &MF) const {
- assert(0 && "What is the frame register");
+ LLVM_UNREACHABLE("What is the frame register");
return SP::G1;
}
unsigned SparcRegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned SparcRegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
int SparcRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "What is the dwarf register number");
+ LLVM_UNREACHABLE("What is the dwarf register number");
return -1;
}
Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Sat Jul 11 15:10:48 2009
@@ -22,6 +22,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cctype>
#include <cstring>
using namespace llvm;
@@ -276,7 +277,7 @@
Flags |= SectionFlags::Small;
break;
default:
- assert(0 && "Unexpected section kind!");
+ LLVM_UNREACHABLE("Unexpected section kind!");
}
if (GV->isWeakForLinker())
@@ -386,7 +387,7 @@
case SectionKind::ThreadBSS:
return ".gnu.linkonce.tb." + GV->getName();
default:
- assert(0 && "Unknown section kind");
+ LLVM_UNREACHABLE("Unknown section kind");
}
return NULL;
}
Modified: llvm/trunk/lib/Target/TargetData.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetData.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetData.cpp (original)
+++ llvm/trunk/lib/Target/TargetData.cpp Sat Jul 11 15:10:48 2009
@@ -23,6 +23,7 @@
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/ManagedStatic.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/System/Mutex.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringExtras.h"
@@ -453,7 +454,7 @@
case Type::VectorTyID:
return cast<VectorType>(Ty)->getBitWidth();
default:
- assert(0 && "TargetData::getTypeSizeInBits(): Unsupported type");
+ LLVM_UNREACHABLE("TargetData::getTypeSizeInBits(): Unsupported type");
break;
}
return 0;
@@ -508,7 +509,7 @@
AlignType = VECTOR_ALIGN;
break;
default:
- assert(0 && "Bad type for getAlignment!!!");
+ LLVM_UNREACHABLE("Bad type for getAlignment!!!");
break;
}
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -33,6 +33,7 @@
#include "llvm/CodeGen/DwarfWriter.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetAsmInfo.h"
@@ -54,7 +55,7 @@
else if (Subtarget->isTargetELF())
O << ".Lllvm$" << getFunctionNumber() << ".$piclabel";
else
- assert(0 && "Don't know how to print PIC label!\n");
+ LLVM_UNREACHABLE( "Don't know how to print PIC label!\n");
}
/// PrintUnmangledNameSafely - Print out the printable characters in the name.
@@ -154,7 +155,7 @@
}
break;
default:
- assert(0 && "Unsupported DecorationStyle");
+ LLVM_UNREACHABLE( "Unsupported DecorationStyle");
}
}
@@ -166,7 +167,7 @@
SwitchToSection(TAI->SectionForGlobal(F));
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
case Function::PrivateLinkage:
EmitAlignment(FnAlign, F);
@@ -292,7 +293,7 @@
void X86ATTAsmPrinter::print_pcrel_imm(const MachineInstr *MI, unsigned OpNo) {
const MachineOperand &MO = MI->getOperand(OpNo);
switch (MO.getType()) {
- default: assert(0 && "Unknown pcrel immediate operand");
+ default: LLVM_UNREACHABLE( "Unknown pcrel immediate operand");
case MachineOperand::MO_Immediate:
O << MO.getImm();
return;
@@ -375,7 +376,7 @@
const char *Modifier) {
const MachineOperand &MO = MI->getOperand(OpNo);
switch (MO.getType()) {
- default: assert(0 && "unknown operand type!");
+ default: LLVM_UNREACHABLE( "unknown operand type!");
case MachineOperand::MO_Register: {
assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
"Virtual registers should not make it this far!");
@@ -472,7 +473,7 @@
switch (MO.getTargetFlags()) {
default:
- assert(0 && "Unknown target flag on GV operand");
+ LLVM_UNREACHABLE( "Unknown target flag on GV operand");
case X86II::MO_NO_FLAG: // No flag.
break;
case X86II::MO_DARWIN_NONLAZY:
@@ -775,7 +776,7 @@
} else if (MO.isMBB()) {
MCOp.MakeMBBLabel(getFunctionNumber(), MO.getMBB()->getNumber());
} else {
- assert(0 && "Unimp");
+ LLVM_UNREACHABLE( "Unimp");
}
TmpInst.addOperand(MCOp);
@@ -927,7 +928,7 @@
case GlobalValue::InternalLinkage:
break;
default:
- assert(0 && "Unknown linkage type!");
+ LLVM_UNREACHABLE( "Unknown linkage type!");
}
EmitAlignment(Align, GVar);
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -28,7 +28,7 @@
void X86ATTAsmPrinter::printSSECC(const MCInst *MI, unsigned Op) {
switch (MI->getOperand(Op).getImm()) {
- default: assert(0 && "Invalid ssecc argument!");
+ default: LLVM_UNREACHABLE( "Invalid ssecc argument!");
case 0: O << "eq"; break;
case 1: O << "lt"; break;
case 2: O << "le"; break;
@@ -42,7 +42,7 @@
void X86ATTAsmPrinter::printPICLabel(const MCInst *MI, unsigned Op) {
- assert(0 &&
+ LLVM_UNREACHABLE(
"This is only used for MOVPC32r, should lower before asm printing!");
}
@@ -61,7 +61,7 @@
O << TAI->getPrivateGlobalPrefix() << "BB" << Op.getMBBLabelFunction()
<< '_' << Op.getMBBLabelBlock();
else
- assert(0 && "Unknown pcrel immediate operand");
+ LLVM_UNREACHABLE( "Unknown pcrel immediate operand");
}
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -26,6 +26,7 @@
#include "llvm/ADT/StringExtras.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/CodeGen/DwarfWriter.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetOptions.h"
@@ -114,7 +115,7 @@
break;
default:
- assert(0 && "Unsupported DecorationStyle");
+ LLVM_UNREACHABLE( "Unsupported DecorationStyle");
}
}
@@ -143,7 +144,7 @@
SwitchToTextSection("_text", F);
switch (F->getLinkage()) {
- default: assert(0 && "Unsupported linkage type!");
+ default: LLVM_UNREACHABLE( "Unsupported linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage:
EmitAlignment(FnAlign);
@@ -267,7 +268,7 @@
void X86IntelAsmPrinter::print_pcrel_imm(const MachineInstr *MI, unsigned OpNo){
const MachineOperand &MO = MI->getOperand(OpNo);
switch (MO.getType()) {
- default: assert(0 && "Unknown pcrel immediate operand");
+ default: LLVM_UNREACHABLE( "Unknown pcrel immediate operand");
case MachineOperand::MO_Immediate:
O << MO.getImm();
return;
@@ -519,7 +520,7 @@
SwitchToSection(TAI->getDataSection());
break;
default:
- assert(0 && "Unknown linkage type!");
+ LLVM_UNREACHABLE( "Unknown linkage type!");
}
if (!bCustomSegment)
Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Sat Jul 11 15:10:48 2009
@@ -335,7 +335,7 @@
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word;
emitJumpTableAddress(RelocOp->getIndex(), rt, PCAdj);
} else {
- assert(0 && "Unknown value to relocate!");
+ LLVM_UNREACHABLE("Unknown value to relocate!");
}
}
@@ -478,7 +478,7 @@
case X86II::GS:
MCE.emitByte(0x65);
break;
- default: assert(0 && "Invalid segment!");
+ default: LLVM_UNREACHABLE("Invalid segment!");
case 0: break; // No segment override!
}
@@ -513,7 +513,7 @@
(((Desc->TSFlags & X86II::Op0Mask)-X86II::D8)
>> X86II::Op0Shift));
break; // Two-byte opcode prefix
- default: assert(0 && "Invalid prefix!");
+ default: LLVM_UNREACHABLE("Invalid prefix!");
case 0: break; // No prefix!
}
@@ -548,13 +548,13 @@
unsigned char BaseOpcode = II->getBaseOpcodeFor(Desc);
switch (Desc->TSFlags & X86II::FormMask) {
- default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
+ default: LLVM_UNREACHABLE("Unknown FormMask value in X86 MachineCodeEmitter!");
case X86II::Pseudo:
// Remember the current PC offset, this is the PIC relocation
// base address.
switch (Opcode) {
default:
- assert(0 && "psuedo instructions should be removed before code emission");
+ LLVM_UNREACHABLE("psuedo instructions should be removed before code emission");
break;
case TargetInstrInfo::INLINEASM: {
// We allow inline assembler nodes with empty bodies - they can
@@ -620,7 +620,7 @@
} else
emitConstant(MO.getImm(), X86InstrInfo::sizeOfImm(Desc));
} else {
- assert(0 && "Unknown RawFrm operand!");
+ LLVM_UNREACHABLE("Unknown RawFrm operand!");
}
}
break;
Modified: llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -14,6 +14,7 @@
#include "X86ELFWriterInfo.h"
#include "X86Relocations.h"
#include "llvm/Function.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
@@ -42,7 +43,7 @@
return R_X86_64_64;
case X86::reloc_picrel_word:
default:
- assert(0 && "unknown relocation type");
+ LLVM_UNREACHABLE("unknown relocation type");
}
} else {
switch(MachineRelTy) {
@@ -53,7 +54,7 @@
case X86::reloc_absolute_dword:
case X86::reloc_picrel_word:
default:
- assert(0 && "unknown relocation type");
+ LLVM_UNREACHABLE("unknown relocation type");
}
}
return 0;
@@ -65,7 +66,7 @@
case R_X86_64_PC32: return -4;
break;
default:
- assert(0 && "unknown x86 relocation type");
+ LLVM_UNREACHABLE("unknown x86 relocation type");
}
}
return 0;
Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Sat Jul 11 15:10:48 2009
@@ -29,6 +29,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/CallSite.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
@@ -1318,7 +1319,7 @@
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt: {
bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(),
Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Sat Jul 11 15:10:48 2009
@@ -38,6 +38,7 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Compiler.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/SmallPtrSet.h"
@@ -255,7 +256,7 @@
case X86II::CompareFP: handleCompareFP(I); break;
case X86II::CondMovFP: handleCondMovFP(I); break;
case X86II::SpecialFP: handleSpecialFP(I); break;
- default: assert(0 && "Unknown FP Type!");
+ default: LLVM_UNREACHABLE("Unknown FP Type!");
}
// Check to see if any of the values defined by this instruction are dead
@@ -945,7 +946,7 @@
MachineInstr *MI = I;
DebugLoc dl = MI->getDebugLoc();
switch (MI->getOpcode()) {
- default: assert(0 && "Unknown SpecialFP instruction!");
+ default: LLVM_UNREACHABLE("Unknown SpecialFP instruction!");
case X86::FpGET_ST0_32:// Appears immediately after a call returning FP type!
case X86::FpGET_ST0_64:// Appears immediately after a call returning FP type!
case X86::FpGET_ST0_80:// Appears immediately after a call returning FP type!
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Sat Jul 11 15:10:48 2009
@@ -1461,7 +1461,7 @@
bool isSigned = Opcode == ISD::SMUL_LOHI;
if (!isSigned)
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: Opc = X86::MUL8r; MOpc = X86::MUL8m; break;
case MVT::i16: Opc = X86::MUL16r; MOpc = X86::MUL16m; break;
case MVT::i32: Opc = X86::MUL32r; MOpc = X86::MUL32m; break;
@@ -1469,7 +1469,7 @@
}
else
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: Opc = X86::IMUL8r; MOpc = X86::IMUL8m; break;
case MVT::i16: Opc = X86::IMUL16r; MOpc = X86::IMUL16m; break;
case MVT::i32: Opc = X86::IMUL32r; MOpc = X86::IMUL32m; break;
@@ -1478,7 +1478,7 @@
unsigned LoReg, HiReg;
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: LoReg = X86::AL; HiReg = X86::AH; break;
case MVT::i16: LoReg = X86::AX; HiReg = X86::DX; break;
case MVT::i32: LoReg = X86::EAX; HiReg = X86::EDX; break;
@@ -1567,7 +1567,7 @@
bool isSigned = Opcode == ISD::SDIVREM;
if (!isSigned)
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: Opc = X86::DIV8r; MOpc = X86::DIV8m; break;
case MVT::i16: Opc = X86::DIV16r; MOpc = X86::DIV16m; break;
case MVT::i32: Opc = X86::DIV32r; MOpc = X86::DIV32m; break;
@@ -1575,7 +1575,7 @@
}
else
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: Opc = X86::IDIV8r; MOpc = X86::IDIV8m; break;
case MVT::i16: Opc = X86::IDIV16r; MOpc = X86::IDIV16m; break;
case MVT::i32: Opc = X86::IDIV32r; MOpc = X86::IDIV32m; break;
@@ -1585,7 +1585,7 @@
unsigned LoReg, HiReg;
unsigned ClrOpcode, SExtOpcode;
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8:
LoReg = X86::AL; HiReg = X86::AH;
ClrOpcode = 0;
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -1426,7 +1426,7 @@
}
}
} else {
- assert(0 && "Unknown argument type!");
+ LLVM_UNREACHABLE("Unknown argument type!");
}
unsigned Reg = DAG.getMachineFunction().addLiveIn(VA.getLocReg(), RC);
@@ -1721,7 +1721,7 @@
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
@@ -2167,7 +2167,7 @@
}
switch (SetCCOpcode) {
- default: assert(0 && "Invalid integer condition!");
+ default: LLVM_UNREACHABLE("Invalid integer condition!");
case ISD::SETEQ: return X86::COND_E;
case ISD::SETGT: return X86::COND_G;
case ISD::SETGE: return X86::COND_GE;
@@ -2207,7 +2207,7 @@
// 1 | 0 | 0 | X == Y
// 1 | 1 | 1 | unordered
switch (SetCCOpcode) {
- default: assert(0 && "Condcode should be pre-legalized away");
+ default: LLVM_UNREACHABLE("Condcode should be pre-legalized away");
case ISD::SETUEQ:
case ISD::SETEQ: return X86::COND_E;
case ISD::SETOLT: // flipped
@@ -4715,7 +4715,7 @@
Subtarget->is64Bit());
}
- assert(0 && "Unreachable");
+ LLVM_UNREACHABLE("Unreachable");
return SDValue();
}
@@ -5038,7 +5038,7 @@
unsigned Opc;
switch (DstTy.getSimpleVT()) {
- default: assert(0 && "Invalid FP_TO_SINT to lower!");
+ default: LLVM_UNREACHABLE("Invalid FP_TO_SINT to lower!");
case MVT::i16: Opc = X86ISD::FP_TO_INT16_IN_MEM; break;
case MVT::i32: Opc = X86ISD::FP_TO_INT32_IN_MEM; break;
case MVT::i64: Opc = X86ISD::FP_TO_INT64_IN_MEM; break;
@@ -5461,7 +5461,7 @@
NEQ = DAG.getNode(Opc, dl, VT, Op0, Op1, DAG.getConstant(4, MVT::i8));
return DAG.getNode(ISD::AND, dl, VT, ORD, NEQ);
}
- assert(0 && "Illegal FP comparison");
+ LLVM_UNREACHABLE("Illegal FP comparison");
}
// Handle all other FP comparisons here.
return DAG.getNode(Opc, dl, VT, Op0, Op1, DAG.getConstant(SSECC, MVT::i8));
@@ -6397,7 +6397,7 @@
switch (CC) {
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::C:
case CallingConv::X86_StdCall: {
// Pass 'nest' parameter in ECX.
@@ -6646,7 +6646,7 @@
DebugLoc dl = Op.getDebugLoc();
switch (Op.getOpcode()) {
- default: assert(0 && "Unknown ovf instruction!");
+ default: LLVM_UNREACHABLE("Unknown ovf instruction!");
case ISD::SADDO:
// A subtract of one will be selected as a INC. Note that INC doesn't
// set CF, so we can't do this for UADDO.
@@ -6768,7 +6768,7 @@
///
SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
- default: assert(0 && "Should not custom lower this!");
+ default: LLVM_UNREACHABLE("Should not custom lower this!");
case ISD::ATOMIC_CMP_SWAP: return LowerCMP_SWAP(Op,DAG);
case ISD::ATOMIC_LOAD_SUB: return LowerLOAD_SUB(Op,DAG);
case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
@@ -7616,7 +7616,7 @@
// Get the X86 opcode to use.
unsigned Opc;
switch (MI->getOpcode()) {
- default: assert(0 && "illegal opcode!");
+ default: LLVM_UNREACHABLE("illegal opcode!");
case X86::FP32_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m32; break;
case X86::FP32_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m32; break;
case X86::FP32_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m32; break;
@@ -8355,7 +8355,7 @@
SDValue ValOp = N->getOperand(0);
switch (N->getOpcode()) {
default:
- assert(0 && "Unknown shift opcode!");
+ LLVM_UNREACHABLE("Unknown shift opcode!");
break;
case ISD::SHL:
if (VT == MVT::v2i64)
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sat Jul 11 15:10:48 2009
@@ -1299,7 +1299,7 @@
unsigned Opc;
unsigned Size;
switch (MI->getOpcode()) {
- default: assert(0 && "Unreachable!");
+ default: LLVM_UNREACHABLE("Unreachable!");
case X86::SHRD16rri8: Size = 16; Opc = X86::SHLD16rri8; break;
case X86::SHLD16rri8: Size = 16; Opc = X86::SHRD16rri8; break;
case X86::SHRD32rri8: Size = 32; Opc = X86::SHLD32rri8; break;
@@ -1454,7 +1454,7 @@
unsigned X86::GetCondBranchFromCond(X86::CondCode CC) {
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case X86::COND_E: return X86::JE;
case X86::COND_NE: return X86::JNE;
case X86::COND_L: return X86::JL;
@@ -1478,7 +1478,7 @@
/// e.g. turning COND_E to COND_NE.
X86::CondCode X86::GetOppositeBranchCondition(X86::CondCode CC) {
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case X86::COND_E: return X86::COND_NE;
case X86::COND_NE: return X86::COND_E;
case X86::COND_L: return X86::COND_GE;
@@ -2644,7 +2644,7 @@
case X86II::Imm16: return 2;
case X86II::Imm32: return 4;
case X86II::Imm64: return 8;
- default: assert(0 && "Immediate size not set!");
+ default: LLVM_UNREACHABLE("Immediate size not set!");
return 0;
}
}
@@ -2829,7 +2829,7 @@
} else if (RelocOp->isJTI()) {
FinalSize += sizeJumpTableAddress(false);
} else {
- assert(0 && "Unknown value to relocate!");
+ LLVM_UNREACHABLE("Unknown value to relocate!");
}
return FinalSize;
}
@@ -2926,7 +2926,7 @@
case X86II::GS:
++FinalSize;
break;
- default: assert(0 && "Invalid segment!");
+ default: LLVM_UNREACHABLE("Invalid segment!");
case 0: break; // No segment override!
}
@@ -2959,7 +2959,7 @@
case X86II::DC: case X86II::DD: case X86II::DE: case X86II::DF:
++FinalSize;
break; // Two-byte opcode prefix
- default: assert(0 && "Invalid prefix!");
+ default: LLVM_UNREACHABLE("Invalid prefix!");
case 0: break; // No prefix!
}
@@ -2993,7 +2993,7 @@
--NumOps;
switch (Desc->TSFlags & X86II::FormMask) {
- default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
+ default: LLVM_UNREACHABLE("Unknown FormMask value in X86 MachineCodeEmitter!");
case X86II::Pseudo:
// Remember the current PC offset, this is the PIC relocation
// base address.
@@ -3038,7 +3038,7 @@
} else if (MO.isImm()) {
FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
} else {
- assert(0 && "Unknown RawFrm operand!");
+ LLVM_UNREACHABLE("Unknown RawFrm operand!");
}
}
break;
Modified: llvm/trunk/lib/Target/X86/X86JITInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86JITInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86JITInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86JITInfo.cpp Sat Jul 11 15:10:48 2009
@@ -554,7 +554,7 @@
TLSOffset -= size;
return TLSOffset;
#else
- assert(0 && "Cannot allocate thread local storage on this arch!\n");
+ LLVM_UNREACHABLE("Cannot allocate thread local storage on this arch!\n");
return 0;
#endif
}
Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -38,6 +38,7 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm,
@@ -146,7 +147,7 @@
default:
assert(isVirtualRegister(RegNo) && "Unknown physical register!");
- assert(0 && "Register allocator hasn't allocated reg correctly yet!");
+ LLVM_UNREACHABLE("Register allocator hasn't allocated reg correctly yet!");
return 0;
}
}
@@ -973,7 +974,7 @@
case X86::TAILJMPr:
case X86::TAILJMPm: break; // These are ok
default:
- assert(0 && "Can only insert epilog into returning blocks");
+ LLVM_UNREACHABLE("Can only insert epilog into returning blocks");
}
// Get the number of bytes to allocate from the FrameInfo
@@ -1126,12 +1127,12 @@
}
unsigned X86RegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned X86RegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Sat Jul 11 15:10:48 2009
@@ -21,6 +21,7 @@
#include "llvm/Module.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
using namespace llvm::dwarf;
@@ -280,7 +281,7 @@
case SectionKind::RODataMergeStr:
return ".rdata$linkonce" + GV->getName();
default:
- assert(0 && "Unknown section kind");
+ LLVM_UNREACHABLE("Unknown section kind");
}
return NULL;
}
Modified: llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp Sat Jul 11 15:10:48 2009
@@ -255,7 +255,7 @@
O << "\t.cc_top " << CurrentFnName << ".function," << CurrentFnName << "\n";
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE("Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
case Function::PrivateLinkage:
break;
@@ -358,7 +358,7 @@
if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
else
- assert(0 && "not implemented");
+ LLVM_UNREACHABLE("not implemented");
break;
case MachineOperand::MO_Immediate:
O << MO.getImm();
@@ -381,7 +381,7 @@
<< '_' << MO.getIndex();
break;
default:
- assert(0 && "not implemented");
+ LLVM_UNREACHABLE("not implemented");
}
}
@@ -410,7 +410,7 @@
if (printInstruction(MI)) {
return;
}
- assert(0 && "Unhandled instruction in asm writer!");
+ LLVM_UNREACHABLE("Unhandled instruction in asm writer!");
}
bool XCoreAsmPrinter::doInitialization(Module &M) {
Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Sat Jul 11 15:10:48 2009
@@ -167,7 +167,7 @@
case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG);
case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
default:
- assert(0 && "unimplemented operand");
+ LLVM_UNREACHABLE("unimplemented operand");
return SDValue();
}
}
@@ -179,7 +179,7 @@
SelectionDAG &DAG) {
switch (N->getOpcode()) {
default:
- assert(0 && "Don't know how to custom expand this!");
+ LLVM_UNREACHABLE("Don't know how to custom expand this!");
return;
case ISD::ADD:
case ISD::SUB:
@@ -266,7 +266,7 @@
GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal());
}
if (! GVar) {
- assert(0 && "Thread local object not a GlobalVariable?");
+ LLVM_UNREACHABLE("Thread local object not a GlobalVariable?");
return SDValue();
}
const Type *Ty = cast<PointerType>(GV->getType())->getElementType();
@@ -292,7 +292,7 @@
// FIXME there isn't really debug info here
DebugLoc dl = CP->getDebugLoc();
if (Subtarget.isXS1A()) {
- assert(0 && "Lowering of constant pool unimplemented");
+ LLVM_UNREACHABLE("Lowering of constant pool unimplemented");
return SDValue();
} else {
MVT PtrVT = Op.getValueType();
@@ -356,7 +356,7 @@
SDValue XCoreTargetLowering::
LowerVAARG(SDValue Op, SelectionDAG &DAG)
{
- assert(0 && "unimplemented");
+ LLVM_UNREACHABLE("unimplemented");
// FIX Arguments passed by reference need a extra dereference.
SDNode *Node = Op.getNode();
DebugLoc dl = Node->getDebugLoc();
@@ -426,7 +426,7 @@
switch (CallingConv)
{
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::Fast:
case CallingConv::C:
return LowerCCCCallTo(Op, DAG, CallingConv);
@@ -474,7 +474,7 @@
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
@@ -607,7 +607,7 @@
switch(CC)
{
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::C:
case CallingConv::Fast:
return LowerCCCArguments(Op, DAG);
Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp Sat Jul 11 15:10:48 2009
@@ -21,6 +21,7 @@
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "XCoreGenInstrInfo.inc"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
namespace llvm {
namespace XCore {
@@ -186,7 +187,7 @@
static inline unsigned GetCondBranchFromCond(XCore::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case XCore::COND_TRUE : return XCore::BRFT_lru6;
case XCore::COND_FALSE : return XCore::BRFF_lru6;
}
@@ -197,7 +198,7 @@
static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case XCore::COND_TRUE : return XCore::COND_FALSE;
case XCore::COND_FALSE : return XCore::COND_TRUE;
}
@@ -407,7 +408,7 @@
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const
{
- assert(0 && "unimplemented\n");
+ LLVM_UNREACHABLE("unimplemented\n");
}
void XCoreInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
@@ -427,7 +428,7 @@
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const
{
- assert(0 && "unimplemented\n");
+ LLVM_UNREACHABLE("unimplemented\n");
}
bool XCoreInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
Modified: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp Sat Jul 11 15:10:48 2009
@@ -257,7 +257,7 @@
.addReg(ScratchReg, RegState::Kill);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ LLVM_UNREACHABLE("Unexpected Opcode\n");
}
} else {
switch (MI.getOpcode()) {
@@ -278,7 +278,7 @@
.addImm(Offset);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ LLVM_UNREACHABLE("Unexpected Opcode\n");
}
}
} else {
@@ -309,7 +309,7 @@
.addImm(Offset);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ LLVM_UNREACHABLE("Unexpected Opcode\n");
}
}
// Erase old instruction.
Modified: llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp Sat Jul 11 15:10:48 2009
@@ -28,6 +28,7 @@
#include "llvm/Support/CallSite.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/ADT/DenseMap.h"
@@ -882,7 +883,7 @@
Value *LV = new LoadInst(InitBool, InitBool->getName()+".val", CI);
InitBoolUsed = true;
switch (CI->getPredicate()) {
- default: assert(0 && "Unknown ICmp Predicate!");
+ default: LLVM_UNREACHABLE("Unknown ICmp Predicate!");
case ICmpInst::ICMP_ULT:
case ICmpInst::ICMP_SLT:
LV = Context->getConstantIntFalse(); // X < null -> always false
@@ -1163,7 +1164,7 @@
PN->getName()+".f"+utostr(FieldNo), PN);
PHIsToRewrite.push_back(std::make_pair(PN, FieldNo));
} else {
- assert(0 && "Unknown usable value");
+ LLVM_UNREACHABLE("Unknown usable value");
Result = 0;
}
@@ -2056,7 +2057,7 @@
for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i)
Elts.push_back(Context->getUndef(STy->getElementType(i)));
} else {
- assert(0 && "This code is out of sync with "
+ LLVM_UNREACHABLE("This code is out of sync with "
" ConstantFoldLoadThroughGEPConstantExpr");
}
@@ -2084,7 +2085,7 @@
Constant *Elt = Context->getUndef(ATy->getElementType());
Elts.assign(ATy->getNumElements(), Elt);
} else {
- assert(0 && "This code is out of sync with "
+ LLVM_UNREACHABLE("This code is out of sync with "
" ConstantFoldLoadThroughGEPConstantExpr");
}
Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Sat Jul 11 15:10:48 2009
@@ -53,6 +53,7 @@
#include "llvm/Support/CallSite.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include <map>
#include <vector>
using namespace llvm;
@@ -128,7 +129,7 @@
return false;
default:
- assert(0 && "Unknown type!");
+ LLVM_UNREACHABLE("Unknown type!");
return false;
case Type::PointerTyID: {
@@ -469,7 +470,7 @@
return ExternalStrong;
}
- assert(0 && "Unknown LinkageType.");
+ LLVM_UNREACHABLE("Unknown LinkageType.");
return ExternalWeak;
}
@@ -575,7 +576,7 @@
case Internal:
switch (catG) {
case ExternalStrong:
- assert(0);
+ llvm_unreachable();
// fall-through
case ExternalWeak:
if (F->hasAddressTaken())
Modified: llvm/trunk/lib/Transforms/Instrumentation/RSProfiling.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/RSProfiling.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/RSProfiling.cpp (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/RSProfiling.cpp Sat Jul 11 15:10:48 2009
@@ -44,6 +44,7 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Transforms/Instrumentation.h"
#include "RSProfiling.h"
#include <set>
@@ -407,7 +408,7 @@
TransCache[v] = v;
return v;
}
- assert(0 && "Value not handled");
+ LLVM_UNREACHABLE("Value not handled");
return 0;
}
Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sat Jul 11 15:10:48 2009
@@ -37,6 +37,7 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
#include "llvm/Transforms/Utils/Local.h"
#include <cstdio>
@@ -201,7 +202,7 @@
Expression::ExpressionOpcode ValueTable::getOpcode(BinaryOperator* BO) {
switch(BO->getOpcode()) {
default: // THIS SHOULD NEVER HAPPEN
- assert(0 && "Binary operator with unknown opcode?");
+ LLVM_UNREACHABLE("Binary operator with unknown opcode?");
case Instruction::Add: return Expression::ADD;
case Instruction::FAdd: return Expression::FADD;
case Instruction::Sub: return Expression::SUB;
@@ -227,7 +228,7 @@
if (isa<ICmpInst>(C)) {
switch (C->getPredicate()) {
default: // THIS SHOULD NEVER HAPPEN
- assert(0 && "Comparison with unknown predicate?");
+ LLVM_UNREACHABLE("Comparison with unknown predicate?");
case ICmpInst::ICMP_EQ: return Expression::ICMPEQ;
case ICmpInst::ICMP_NE: return Expression::ICMPNE;
case ICmpInst::ICMP_UGT: return Expression::ICMPUGT;
@@ -242,7 +243,7 @@
} else {
switch (C->getPredicate()) {
default: // THIS SHOULD NEVER HAPPEN
- assert(0 && "Comparison with unknown predicate?");
+ LLVM_UNREACHABLE("Comparison with unknown predicate?");
case FCmpInst::FCMP_OEQ: return Expression::FCMPOEQ;
case FCmpInst::FCMP_OGT: return Expression::FCMPOGT;
case FCmpInst::FCMP_OGE: return Expression::FCMPOGE;
@@ -264,7 +265,7 @@
Expression::ExpressionOpcode ValueTable::getOpcode(CastInst* C) {
switch(C->getOpcode()) {
default: // THIS SHOULD NEVER HAPPEN
- assert(0 && "Cast operator with unknown opcode?");
+ LLVM_UNREACHABLE("Cast operator with unknown opcode?");
case Instruction::Trunc: return Expression::TRUNC;
case Instruction::ZExt: return Expression::ZEXT;
case Instruction::SExt: return Expression::SEXT;
Modified: llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVNPRE.cpp Sat Jul 11 15:10:48 2009
@@ -39,6 +39,7 @@
#include "llvm/Support/CFG.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include <algorithm>
#include <deque>
#include <map>
@@ -240,7 +241,7 @@
// THIS SHOULD NEVER HAPPEN
default:
- assert(0 && "Binary operator with unknown opcode?");
+ LLVM_UNREACHABLE("Binary operator with unknown opcode?");
return Expression::ADD;
}
}
@@ -271,7 +272,7 @@
// THIS SHOULD NEVER HAPPEN
default:
- assert(0 && "Comparison with unknown predicate?");
+ LLVM_UNREACHABLE("Comparison with unknown predicate?");
return Expression::ICMPEQ;
}
} else {
@@ -307,7 +308,7 @@
// THIS SHOULD NEVER HAPPEN
default:
- assert(0 && "Comparison with unknown predicate?");
+ LLVM_UNREACHABLE("Comparison with unknown predicate?");
return Expression::FCMPOEQ;
}
}
@@ -343,7 +344,7 @@
// THIS SHOULD NEVER HAPPEN
default:
- assert(0 && "Cast operator with unknown opcode?");
+ LLVM_UNREACHABLE("Cast operator with unknown opcode?");
return Expression::BITCAST;
}
}
@@ -577,7 +578,7 @@
if (VI != valueNumbering.end())
return VI->second;
else
- assert(0 && "Value not numbered?");
+ LLVM_UNREACHABLE("Value not numbered?");
return 0;
}
@@ -767,7 +768,7 @@
if (v == VN.lookup(*I))
return *I;
- assert(0 && "No leader found, but present bit is set?");
+ LLVM_UNREACHABLE("No leader found, but present bit is set?");
return 0;
}
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Sat Jul 11 15:10:48 2009
@@ -1679,7 +1679,7 @@
UndefElts = UndefElts2;
if (VWidth > InVWidth) {
- assert(0 && "Unimp");
+ LLVM_UNREACHABLE("Unimp");
// If there are more elements in the result than there are in the source,
// then an output element is undef if the corresponding input element is
// undef.
@@ -1687,7 +1687,7 @@
if (UndefElts2[OutIdx/Ratio])
UndefElts.set(OutIdx);
} else if (VWidth < InVWidth) {
- assert(0 && "Unimp");
+ LLVM_UNREACHABLE("Unimp");
// If there are more elements in the source than there are in the result,
// then a result element is undef if all of the corresponding input
// elements are undef.
@@ -1757,7 +1757,7 @@
RHS = InsertNewInstBefore(new ExtractElementInst(RHS, 0U,"tmp"), *II);
switch (II->getIntrinsicID()) {
- default: assert(0 && "Case stmts out of sync!");
+ default: LLVM_UNREACHABLE("Case stmts out of sync!");
case Intrinsic::x86_sse_sub_ss:
case Intrinsic::x86_sse2_sub_sd:
TmpV = InsertNewInstBefore(BinaryOperator::CreateFSub(LHS, RHS,
@@ -2019,7 +2019,7 @@
PN->getIncomingValue(i), C, "phitmp",
NonConstBB->getTerminator());
else
- assert(0 && "Unknown binop!");
+ LLVM_UNREACHABLE("Unknown binop!");
AddToWorkList(cast<Instruction>(InV));
}
@@ -3355,7 +3355,7 @@
case ICmpInst::ICMP_SLE: return 6; // 110
// True -> 7
default:
- assert(0 && "Invalid ICmp predicate!");
+ LLVM_UNREACHABLE("Invalid ICmp predicate!");
return 0;
}
}
@@ -3383,7 +3383,7 @@
// True -> 7
default:
// Not expecting FCMP_FALSE and FCMP_TRUE;
- assert(0 && "Unexpected FCmp predicate!");
+ LLVM_UNREACHABLE("Unexpected FCmp predicate!");
return 0;
}
}
@@ -3395,7 +3395,7 @@
static Value *getICmpValue(bool sign, unsigned code, Value *LHS, Value *RHS,
LLVMContext *Context) {
switch (code) {
- default: assert(0 && "Illegal ICmp code!");
+ default: LLVM_UNREACHABLE("Illegal ICmp code!");
case 0: return Context->getConstantIntFalse();
case 1:
if (sign)
@@ -3429,7 +3429,7 @@
static Value *getFCmpValue(bool isordered, unsigned code,
Value *LHS, Value *RHS, LLVMContext *Context) {
switch (code) {
- default: assert(0 && "Illegal FCmp code!");
+ default: LLVM_UNREACHABLE("Illegal FCmp code!");
case 0:
if (isordered)
return new FCmpInst(*Context, FCmpInst::FCMP_ORD, LHS, RHS);
@@ -3508,7 +3508,7 @@
case Instruction::And: Code = LHSCode & RHSCode; break;
case Instruction::Or: Code = LHSCode | RHSCode; break;
case Instruction::Xor: Code = LHSCode ^ RHSCode; break;
- default: assert(0 && "Illegal logical opcode!"); return 0;
+ default: LLVM_UNREACHABLE("Illegal logical opcode!"); return 0;
}
bool isSigned = ICmpInst::isSignedPredicate(RHSICI->getPredicate()) ||
@@ -3843,10 +3843,10 @@
assert(LHSCst != RHSCst && "Compares not folded above?");
switch (LHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X == 13 & X == 15) -> false
case ICmpInst::ICMP_UGT: // (X == 13 & X > 15) -> false
case ICmpInst::ICMP_SGT: // (X == 13 & X > 15) -> false
@@ -3858,7 +3858,7 @@
}
case ICmpInst::ICMP_NE:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_ULT:
if (LHSCst == SubOne(RHSCst, Context)) // (X != 13 & X u< 14) -> X < 13
return new ICmpInst(*Context, ICmpInst::ICMP_ULT, Val, LHSCst);
@@ -3885,7 +3885,7 @@
break;
case ICmpInst::ICMP_ULT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X u< 13 & X == 15) -> false
case ICmpInst::ICMP_UGT: // (X u< 13 & X u> 15) -> false
return ReplaceInstUsesWith(I, Context->getConstantIntFalse());
@@ -3900,7 +3900,7 @@
break;
case ICmpInst::ICMP_SLT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X s< 13 & X == 15) -> false
case ICmpInst::ICMP_SGT: // (X s< 13 & X s> 15) -> false
return ReplaceInstUsesWith(I, Context->getConstantIntFalse());
@@ -3915,7 +3915,7 @@
break;
case ICmpInst::ICMP_UGT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X u> 13 & X == 15) -> X == 15
case ICmpInst::ICMP_UGT: // (X u> 13 & X u> 15) -> X u> 15
return ReplaceInstUsesWith(I, RHS);
@@ -3934,7 +3934,7 @@
break;
case ICmpInst::ICMP_SGT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X s> 13 & X == 15) -> X == 15
case ICmpInst::ICMP_SGT: // (X s> 13 & X s> 15) -> X s> 15
return ReplaceInstUsesWith(I, RHS);
@@ -4532,10 +4532,10 @@
assert(LHSCst != RHSCst && "Compares not folded above?");
switch (LHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ:
if (LHSCst == SubOne(RHSCst, Context)) {
// (X == 13 | X == 14) -> X-13 <u 2
@@ -4558,7 +4558,7 @@
break;
case ICmpInst::ICMP_NE:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X != 13 | X == 15) -> X != 13
case ICmpInst::ICMP_UGT: // (X != 13 | X u> 15) -> X != 13
case ICmpInst::ICMP_SGT: // (X != 13 | X s> 15) -> X != 13
@@ -4571,7 +4571,7 @@
break;
case ICmpInst::ICMP_ULT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X u< 13 | X == 14) -> no change
break;
case ICmpInst::ICMP_UGT: // (X u< 13 | X u> 15) -> (X-13) u> 2
@@ -4592,7 +4592,7 @@
break;
case ICmpInst::ICMP_SLT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X s< 13 | X == 14) -> no change
break;
case ICmpInst::ICMP_SGT: // (X s< 13 | X s> 15) -> (X-13) s> 2
@@ -4613,7 +4613,7 @@
break;
case ICmpInst::ICMP_UGT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X u> 13 | X == 15) -> X u> 13
case ICmpInst::ICMP_UGT: // (X u> 13 | X u> 15) -> X u> 13
return ReplaceInstUsesWith(I, LHS);
@@ -4628,7 +4628,7 @@
break;
case ICmpInst::ICMP_SGT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X s> 13 | X == 15) -> X > 13
case ICmpInst::ICMP_SGT: // (X s> 13 | X s> 15) -> X > 13
return ReplaceInstUsesWith(I, LHS);
@@ -5704,7 +5704,7 @@
ICmpInst::Predicate Pred;
switch (I.getPredicate()) {
- default: assert(0 && "Unexpected predicate!");
+ default: LLVM_UNREACHABLE("Unexpected predicate!");
case FCmpInst::FCMP_UEQ:
case FCmpInst::FCMP_OEQ:
Pred = ICmpInst::ICMP_EQ;
@@ -5798,7 +5798,7 @@
// the compare predicate and sometimes the value. RHSC is rounded towards
// zero at this point.
switch (Pred) {
- default: assert(0 && "Unexpected integer comparison!");
+ default: LLVM_UNREACHABLE("Unexpected integer comparison!");
case ICmpInst::ICMP_NE: // (float)int != 4.4 --> true
return ReplaceInstUsesWith(I, Context->getConstantIntTrue());
case ICmpInst::ICMP_EQ: // (float)int == 4.4 --> false
@@ -5875,7 +5875,7 @@
// Simplify 'fcmp pred X, X'
if (Op0 == Op1) {
switch (I.getPredicate()) {
- default: assert(0 && "Unknown predicate!");
+ default: LLVM_UNREACHABLE("Unknown predicate!");
case FCmpInst::FCMP_UEQ: // True if unordered or equal
case FCmpInst::FCMP_UGE: // True if unordered, greater than, or equal
case FCmpInst::FCMP_ULE: // True if unordered, less than, or equal
@@ -5994,7 +5994,7 @@
// icmp's with boolean values can always be turned into bitwise operations
if (Ty == Type::Int1Ty) {
switch (I.getPredicate()) {
- default: assert(0 && "Invalid icmp instruction!");
+ default: LLVM_UNREACHABLE("Invalid icmp instruction!");
case ICmpInst::ICMP_EQ: { // icmp eq i1 A, B -> ~(A^B)
Instruction *Xor = BinaryOperator::CreateXor(Op0, Op1, I.getName()+"tmp");
InsertNewInstBefore(Xor, I);
@@ -6136,7 +6136,7 @@
// Based on the range information we know about the LHS, see if we can
// simplify this comparison. For example, (x&4) < 8 is always true.
switch (I.getPredicate()) {
- default: assert(0 && "Unknown icmp opcode!");
+ default: LLVM_UNREACHABLE("Unknown icmp opcode!");
case ICmpInst::ICMP_EQ:
if (Op0Max.ult(Op1Min) || Op0Min.ugt(Op1Max))
return ReplaceInstUsesWith(I, Context->getConstantIntFalse());
@@ -6645,7 +6645,7 @@
Value *X = DivI->getOperand(0);
switch (Pred) {
- default: assert(0 && "Unhandled icmp opcode!");
+ default: LLVM_UNREACHABLE("Unhandled icmp opcode!");
case ICmpInst::ICMP_EQ:
if (LoOverflow && HiOverflow)
return ReplaceInstUsesWith(ICI, Context->getConstantIntFalse());
@@ -8081,7 +8081,7 @@
}
default:
// TODO: Can handle more cases here.
- assert(0 && "Unreachable!");
+ LLVM_UNREACHABLE("Unreachable!");
break;
}
@@ -8296,7 +8296,7 @@
default:
// All the others use floating point so we shouldn't actually
// get here because of the check above.
- assert(0 && "Unknown cast type");
+ LLVM_UNREACHABLE("Unknown cast type");
case Instruction::Trunc:
DoXForm = true;
break;
@@ -8352,7 +8352,7 @@
assert(Res->getType() == DestTy);
switch (CI.getOpcode()) {
- default: assert(0 && "Unknown cast type!");
+ default: LLVM_UNREACHABLE("Unknown cast type!");
case Instruction::Trunc:
case Instruction::BitCast:
// Just replace this cast with the result.
@@ -9196,7 +9196,7 @@
else
return BinaryOperator::Create(BO->getOpcode(), NewSI, MatchOp);
}
- assert(0 && "Shouldn't get here");
+ LLVM_UNREACHABLE("Shouldn't get here");
return 0;
}
@@ -9238,7 +9238,7 @@
NewSel->takeName(TVI);
if (BinaryOperator *BO = dyn_cast<BinaryOperator>(TVI))
return BinaryOperator::Create(BO->getOpcode(), FalseVal, NewSel);
- assert(0 && "Unknown instruction!!");
+ LLVM_UNREACHABLE("Unknown instruction!!");
}
}
}
@@ -9267,7 +9267,7 @@
NewSel->takeName(FVI);
if (BinaryOperator *BO = dyn_cast<BinaryOperator>(FVI))
return BinaryOperator::Create(BO->getOpcode(), TrueVal, NewSel);
- assert(0 && "Unknown instruction!!");
+ LLVM_UNREACHABLE("Unknown instruction!!");
}
}
}
Modified: llvm/trunk/lib/Transforms/Scalar/SCCP.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SCCP.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SCCP.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SCCP.cpp Sat Jul 11 15:10:48 2009
@@ -456,7 +456,7 @@
} else if (SCValue.isConstant())
Succs[SI->findCaseValue(cast<ConstantInt>(SCValue.getConstant()))] = true;
} else {
- assert(0 && "SCCP: Don't know how to handle this terminator!");
+ LLVM_UNREACHABLE("SCCP: Don't know how to handle this terminator!");
}
}
@@ -1806,7 +1806,7 @@
} else if (SwitchInst *SI = dyn_cast<SwitchInst>(I)) {
assert(isa<UndefValue>(SI->getCondition()) && "Switch should fold");
} else {
- assert(0 && "Didn't fold away reference to block!");
+ LLVM_UNREACHABLE("Didn't fold away reference to block!");
}
#endif
Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Sat Jul 11 15:10:48 2009
@@ -267,7 +267,7 @@
// Check that all of the users of the allocation are capable of being
// transformed.
switch (isSafeAllocaToScalarRepl(AI)) {
- default: assert(0 && "Unexpected value!");
+ default: LLVM_UNREACHABLE("Unexpected value!");
case 0: // Not safe to scalar replace.
break;
case 1: // Safe, but requires cleanup/canonicalizations first
Modified: llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp Sat Jul 11 15:10:48 2009
@@ -26,6 +26,7 @@
#include "llvm/Type.h"
#include "llvm/Support/CFG.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
using namespace llvm;
@@ -222,8 +223,8 @@
// If NewBBDominatesDestBB hasn't been computed yet, do so with DF.
if (!OtherPreds.empty()) {
// FIXME: IMPLEMENT THIS!
- assert(0 && "Requiring domfrontiers but not idom/domtree/domset."
- " not implemented yet!");
+ LLVM_UNREACHABLE("Requiring domfrontiers but not idom/domtree/domset."
+ " not implemented yet!");
}
// Since the new block is dominated by its only predecessor TIBB,
Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Sat Jul 11 15:10:48 2009
@@ -20,6 +20,7 @@
#include "llvm/LLVMContext.h"
#include "llvm/MDNode.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
Value *llvm::MapValue(const Value *V, ValueMapTy &VM, LLVMContext *Context) {
@@ -126,7 +127,7 @@
return VM[V] = C;
} else {
- assert(0 && "Unknown type of constant!");
+ LLVM_UNREACHABLE("Unknown type of constant!");
}
}
Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AsmWriter.cpp (original)
+++ llvm/trunk/lib/VMCore/AsmWriter.cpp Sat Jul 11 15:10:48 2009
@@ -97,7 +97,7 @@
unsigned NameLen, PrefixType Prefix) {
assert(NameStr && "Cannot get empty name!");
switch (Prefix) {
- default: assert(0 && "Bad prefix!");
+ default: LLVM_UNREACHABLE("Bad prefix!");
case NoPrefix: break;
case GlobalPrefix: OS << '@'; break;
case LabelPrefix: break;
@@ -937,7 +937,7 @@
else if (&CFP->getValueAPF().getSemantics() == &APFloat::PPCDoubleDouble)
Out << 'M';
else
- assert(0 && "Unsupported floating point type");
+ LLVM_UNREACHABLE("Unsupported floating point type");
// api needed to prevent premature destruction
APInt api = CFP->getValueAPF().bitcastToAPInt();
const uint64_t* p = api.getRawData();
@@ -1210,7 +1210,7 @@
else if (const Function *F = dyn_cast<Function>(G))
printFunction(F);
else
- assert(0 && "Unknown global");
+ LLVM_UNREACHABLE("Unknown global");
}
void write(const BasicBlock *BB) { printBasicBlock(BB); }
@@ -1358,7 +1358,7 @@
static void PrintVisibility(GlobalValue::VisibilityTypes Vis,
raw_ostream &Out) {
switch (Vis) {
- default: assert(0 && "Invalid visibility style!");
+ default: LLVM_UNREACHABLE("Invalid visibility style!");
case GlobalValue::DefaultVisibility: break;
case GlobalValue::HiddenVisibility: Out << "hidden "; break;
case GlobalValue::ProtectedVisibility: Out << "protected "; break;
@@ -1969,7 +1969,7 @@
} else if (isa<InlineAsm>(this)) {
WriteAsOperand(OS, this, true, 0);
} else {
- assert(0 && "Unknown value to print out!");
+ LLVM_UNREACHABLE("Unknown value to print out!");
}
}
Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original)
+++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Sat Jul 11 15:10:48 2009
@@ -19,6 +19,7 @@
#include "llvm/Instructions.h"
#include "llvm/Intrinsics.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cstring>
using namespace llvm;
@@ -333,13 +334,13 @@
// Clean up the old call now that it has been completely upgraded.
CI->eraseFromParent();
} else {
- assert(0 && "Unknown function for CallInst upgrade.");
+ LLVM_UNREACHABLE("Unknown function for CallInst upgrade.");
}
return;
}
switch (NewFn->getIntrinsicID()) {
- default: assert(0 && "Unknown function for CallInst upgrade.");
+ default: LLVM_UNREACHABLE("Unknown function for CallInst upgrade.");
case Intrinsic::x86_mmx_psll_d:
case Intrinsic::x86_mmx_psll_q:
case Intrinsic::x86_mmx_psll_w:
Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/ConstantFold.cpp (original)
+++ llvm/trunk/lib/VMCore/ConstantFold.cpp Sat Jul 11 15:10:48 2009
@@ -26,6 +26,7 @@
#include "llvm/GlobalAlias.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/MathExtras.h"
@@ -306,7 +307,7 @@
break;
}
- assert(0 && "Failed to cast constant expression");
+ LLVM_UNREACHABLE("Failed to cast constant expression");
return 0;
}
@@ -1304,7 +1305,7 @@
APInt V1 = cast<ConstantInt>(C1)->getValue();
APInt V2 = cast<ConstantInt>(C2)->getValue();
switch (pred) {
- default: assert(0 && "Invalid ICmp Predicate"); return 0;
+ default: LLVM_UNREACHABLE("Invalid ICmp Predicate"); return 0;
case ICmpInst::ICMP_EQ: return ConstantInt::get(Type::Int1Ty, V1 == V2);
case ICmpInst::ICMP_NE: return ConstantInt::get(Type::Int1Ty, V1 != V2);
case ICmpInst::ICMP_SLT:return ConstantInt::get(Type::Int1Ty, V1.slt(V2));
@@ -1321,7 +1322,7 @@
APFloat C2V = cast<ConstantFP>(C2)->getValueAPF();
APFloat::cmpResult R = C1V.compare(C2V);
switch (pred) {
- default: assert(0 && "Invalid FCmp Predicate"); return 0;
+ default: LLVM_UNREACHABLE("Invalid FCmp Predicate"); return 0;
case FCmpInst::FCMP_FALSE: return ConstantInt::getFalse();
case FCmpInst::FCMP_TRUE: return ConstantInt::getTrue();
case FCmpInst::FCMP_UNO:
@@ -1377,7 +1378,7 @@
if (C1->getType()->isFloatingPoint()) {
int Result = -1; // -1 = unknown, 0 = known false, 1 = known true.
switch (evaluateFCmpRelation(C1, C2)) {
- default: assert(0 && "Unknown relation!");
+ default: LLVM_UNREACHABLE("Unknown relation!");
case FCmpInst::FCMP_UNO:
case FCmpInst::FCMP_ORD:
case FCmpInst::FCMP_UEQ:
@@ -1436,7 +1437,7 @@
// Evaluate the relation between the two constants, per the predicate.
int Result = -1; // -1 = unknown, 0 = known false, 1 = known true.
switch (evaluateICmpRelation(C1, C2, CmpInst::isSigned(pred))) {
- default: assert(0 && "Unknown relational!");
+ default: LLVM_UNREACHABLE("Unknown relational!");
case ICmpInst::BAD_ICMP_PREDICATE:
break; // Couldn't determine anything about these constants.
case ICmpInst::ICMP_EQ: // We know the constants are equal!
Modified: llvm/trunk/lib/VMCore/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Constants.cpp (original)
+++ llvm/trunk/lib/VMCore/Constants.cpp Sat Jul 11 15:10:48 2009
@@ -1939,7 +1939,7 @@
if (V.opcode == Instruction::FCmp)
return new CompareConstantExpr(Ty, Instruction::FCmp, V.predicate,
V.operands[0], V.operands[1]);
- assert(0 && "Invalid ConstantExpr!");
+ LLVM_UNREACHABLE("Invalid ConstantExpr!");
return 0;
}
};
@@ -2030,7 +2030,7 @@
switch (opc) {
default:
- assert(0 && "Invalid cast opcode");
+ LLVM_UNREACHABLE("Invalid cast opcode");
break;
case Instruction::Trunc: return getTrunc(C, Ty);
case Instruction::ZExt: return getZExt(C, Ty);
@@ -2287,7 +2287,7 @@
Constant *ConstantExpr::getCompareTy(unsigned short predicate,
Constant *C1, Constant *C2) {
switch (predicate) {
- default: assert(0 && "Invalid CmpInst predicate");
+ default: LLVM_UNREACHABLE("Invalid CmpInst predicate");
case CmpInst::FCMP_FALSE: case CmpInst::FCMP_OEQ: case CmpInst::FCMP_OGT:
case CmpInst::FCMP_OGE: case CmpInst::FCMP_OLT: case CmpInst::FCMP_OLE:
case CmpInst::FCMP_ONE: case CmpInst::FCMP_ORD: case CmpInst::FCMP_UNO:
@@ -2894,7 +2894,7 @@
if (C2 == From) C2 = To;
Replacement = ConstantExpr::get(getOpcode(), C1, C2);
} else {
- assert(0 && "Unknown ConstantExpr type!");
+ LLVM_UNREACHABLE("Unknown ConstantExpr type!");
return;
}
Modified: llvm/trunk/lib/VMCore/Core.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Core.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Core.cpp (original)
+++ llvm/trunk/lib/VMCore/Core.cpp Sat Jul 11 15:10:48 2009
@@ -25,6 +25,7 @@
#include "llvm/IntrinsicInst.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/CallSite.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstdlib>
#include <cstring>
@@ -1062,7 +1063,7 @@
return CI->getCallingConv();
else if (InvokeInst *II = dyn_cast<InvokeInst>(V))
return II->getCallingConv();
- assert(0 && "LLVMGetInstructionCallConv applies only to call and invoke!");
+ LLVM_UNREACHABLE("LLVMGetInstructionCallConv applies only to call and invoke!");
return 0;
}
@@ -1072,7 +1073,7 @@
return CI->setCallingConv(CC);
else if (InvokeInst *II = dyn_cast<InvokeInst>(V))
return II->setCallingConv(CC);
- assert(0 && "LLVMSetInstructionCallConv applies only to call and invoke!");
+ LLVM_UNREACHABLE("LLVMSetInstructionCallConv applies only to call and invoke!");
}
void LLVMAddInstrAttribute(LLVMValueRef Instr, unsigned index,
Modified: llvm/trunk/lib/VMCore/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Instructions.cpp (original)
+++ llvm/trunk/lib/VMCore/Instructions.cpp Sat Jul 11 15:10:48 2009
@@ -2705,7 +2705,7 @@
APInt Upper(C);
uint32_t BitWidth = C.getBitWidth();
switch (pred) {
- default: assert(0 && "Invalid ICmp opcode to ConstantRange ctor!");
+ default: LLVM_UNREACHABLE("Invalid ICmp opcode to ConstantRange ctor!");
case ICmpInst::ICMP_EQ: Upper++; break;
case ICmpInst::ICMP_NE: Lower++; break;
case ICmpInst::ICMP_ULT: Lower = APInt::getMinValue(BitWidth); break;
Modified: llvm/trunk/lib/VMCore/PassManager.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/PassManager.cpp (original)
+++ llvm/trunk/lib/VMCore/PassManager.cpp Sat Jul 11 15:10:48 2009
@@ -724,7 +724,7 @@
OtherDT.dump();
cerr << "----- Invalid -----\n";
DT->dump();
- assert(0 && "Invalid dominator info");
+ LLVM_UNREACHABLE("Invalid dominator info");
}
DominanceFrontier *DF = P.getAnalysisIfAvailable<DominanceFrontier>();
@@ -741,7 +741,7 @@
OtherDF.dump();
cerr << "----- Invalid -----\n";
DF->dump();
- assert(0 && "Invalid dominator info");
+ LLVM_UNREACHABLE("Invalid dominator info");
}
}
@@ -883,7 +883,7 @@
// Keep track of higher level analysis used by this manager.
HigherLevelAnalysis.push_back(PRequired);
} else
- assert(0 && "Unable to accomodate Required Pass");
+ LLVM_UNREACHABLE("Unable to accomodate Required Pass");
}
// Set P as P's last user until someone starts using P.
@@ -1106,7 +1106,7 @@
cerr << "Unable to schedule '" << RequiredPass->getPassName();
cerr << "' required by '" << P->getPassName() << "'\n";
#endif
- assert(0 && "Unable to schedule pass");
+ LLVM_UNREACHABLE("Unable to schedule pass");
}
// Destructor
Modified: llvm/trunk/lib/VMCore/Type.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Type.cpp (original)
+++ llvm/trunk/lib/VMCore/Type.cpp Sat Jul 11 15:10:48 2009
@@ -634,7 +634,7 @@
}
return true;
} else {
- assert(0 && "Unknown derived type!");
+ LLVM_UNREACHABLE("Unknown derived type!");
return false;
}
}
Modified: llvm/trunk/lib/VMCore/ValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ValueTypes.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/ValueTypes.cpp (original)
+++ llvm/trunk/lib/VMCore/ValueTypes.cpp Sat Jul 11 15:10:48 2009
@@ -16,6 +16,7 @@
#include "llvm/LLVMContext.h"
#include "llvm/Type.h"
#include "llvm/DerivedTypes.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
MVT MVT::getExtendedIntegerVT(unsigned BitWidth) {
@@ -90,7 +91,7 @@
getVectorElementType().getMVTString();
if (isInteger())
return "i" + utostr(getSizeInBits());
- assert(0 && "Invalid MVT!");
+ LLVM_UNREACHABLE("Invalid MVT!");
return "?";
case MVT::i1: return "i1";
case MVT::i8: return "i8";
@@ -213,7 +214,7 @@
switch (Ty->getTypeID()) {
default:
if (HandleUnknown) return MVT::Other;
- assert(0 && "Unknown type!");
+ LLVM_UNREACHABLE("Unknown type!");
return MVT::isVoid;
case Type::VoidTyID:
return MVT::isVoid;
Modified: llvm/trunk/lib/VMCore/Verifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=75379&r1=75378&r2=75379&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Verifier.cpp (original)
+++ llvm/trunk/lib/VMCore/Verifier.cpp Sat Jul 11 15:10:48 2009
@@ -208,7 +208,7 @@
if (!Broken) return false;
msgs << "Broken module found, ";
switch (action) {
- default: assert(0 && "Unknown action");
+ default: LLVM_UNREACHABLE("Unknown action");
case AbortProcessAction:
msgs << "compilation aborted!\n";
cerr << msgs.str();
@@ -1117,7 +1117,7 @@
"Shift return type must be same as operands!", &B);
break;
default:
- assert(0 && "Unknown BinaryOperator opcode!");
+ LLVM_UNREACHABLE("Unknown BinaryOperator opcode!");
}
visitInstruction(B);
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