[llvm-commits] [llvm] r75218 - in /llvm/trunk: lib/Target/ARM/ARM.h lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/ARMTargetMachine.cpp lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp lib/Target/ARM/Thumb2ITBlockPass.cpp test/CodeGen/Thumb2/thumb2-select.ll test/CodeGen/Thumb2/thumb2-select_xform.ll
Evan Cheng
evan.cheng at apple.com
Thu Jul 9 18:54:43 PDT 2009
Author: evancheng
Date: Thu Jul 9 20:54:42 2009
New Revision: 75218
URL: http://llvm.org/viewvc/llvm-project?rev=75218&view=rev
Log:
Add a thumb2 pass to insert IT blocks.
Added:
llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
Modified:
llvm/trunk/lib/Target/ARM/ARM.h
llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll
llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll
Modified: llvm/trunk/lib/Target/ARM/ARM.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.h?rev=75218&r1=75217&r2=75218&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.h (original)
+++ llvm/trunk/lib/Target/ARM/ARM.h Thu Jul 9 20:54:42 2009
@@ -108,6 +108,8 @@
FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
FunctionPass *createARMConstantIslandPass();
+FunctionPass *createThumb2ITBlockPass();
+
} // end namespace llvm;
// Defines symbolic names for ARM registers. This defines a mapping from
Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=75218&r1=75217&r2=75218&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Thu Jul 9 20:54:42 2009
@@ -66,11 +66,6 @@
return CurDAG->getTargetConstant(V, MVT::i32);
}]>;
-// IT block condition mask
-def it_mask : Operand<i32> {
- let PrintMethod = "printThumbITMask";
-}
-
// Define Thumb specific addressing modes.
// t_addrmode_rr := reg + reg
@@ -212,10 +207,6 @@
def tBcc : T1I<(outs), (ins brtarget:$target, pred:$cc), "b$cc $target",
[/*(ARMbrcond bb:$target, imm:$cc)*/]>;
-// IT block
-def tIT : TI<(outs), (ins pred:$cc, it_mask:$mask),
- "it$mask $cc", []>;
-
//===----------------------------------------------------------------------===//
// Load Store Instructions.
//
Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=75218&r1=75217&r2=75218&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Thu Jul 9 20:54:42 2009
@@ -11,6 +11,16 @@
//
//===----------------------------------------------------------------------===//
+// IT block predicate field
+def it_pred : Operand<i32> {
+ let PrintMethod = "printPredicateOperand";
+}
+
+// IT block condition mask
+def it_mask : Operand<i32> {
+ let PrintMethod = "printThumbITMask";
+}
+
// Shifted operands. No register controlled shifts for Thumb2.
// Note: We do not support rrx shifted operands yet.
def t2_so_reg : Operand<i32>, // reg imm
@@ -1121,6 +1131,12 @@
"b", " $target",
[/*(ARMbrcond bb:$target, imm:$cc)*/]>;
+
+// IT block
+def t2IT : Thumb2XI<(outs), (ins it_pred:$cc, it_mask:$mask),
+ AddrModeNone, Size2Bytes,
+ "it$mask $cc", "", []>;
+
//===----------------------------------------------------------------------===//
// Non-Instruction Patterns
//
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=75218&r1=75217&r2=75218&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Thu Jul 9 20:54:42 2009
@@ -173,6 +173,9 @@
!DisableIfConversion && !Subtarget.isThumb())
PM.add(createIfConverterPass());
+ if (Subtarget.isThumb2())
+ PM.add(createThumb2ITBlockPass());
+
PM.add(createARMConstantIslandPass());
return true;
}
Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=75218&r1=75217&r2=75218&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Thu Jul 9 20:54:42 2009
@@ -642,7 +642,7 @@
unsigned Mask = MI->getOperand(Op).getImm();
unsigned NumTZ = CountTrailingZeros_32(Mask);
assert(NumTZ <= 3 && "Invalid IT mask!");
- for (unsigned Pos = 3, e = NumTZ; Pos >= e; --Pos) {
+ for (unsigned Pos = 3, e = NumTZ; Pos > e; --Pos) {
bool T = (Mask & (1 << Pos)) != 0;
if (T)
O << 't';
Added: llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp?rev=75218&view=auto
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp (added)
+++ llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp Thu Jul 9 20:54:42 2009
@@ -0,0 +1,108 @@
+//===-- Thumb2ITBlockPass.cpp - Insert Thumb IT blocks -----------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "thumb2-it"
+#include "ARM.h"
+#include "ARMInstrInfo.h"
+#include "ARMMachineFunctionInfo.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/ADT/Statistic.h"
+using namespace llvm;
+
+STATISTIC(NumITs, "Number of IT blocks inserted");
+
+namespace {
+ struct VISIBILITY_HIDDEN Thumb2ITBlockPass : public MachineFunctionPass {
+ static char ID;
+ Thumb2ITBlockPass() : MachineFunctionPass(&ID) {}
+
+ const ARMBaseInstrInfo *TII;
+ ARMFunctionInfo *AFI;
+
+ virtual bool runOnMachineFunction(MachineFunction &Fn);
+
+ virtual const char *getPassName() const {
+ return "Thumb IT blocks insertion pass";
+ }
+
+ private:
+ bool InsertITBlocks(MachineBasicBlock &MBB);
+ };
+ char Thumb2ITBlockPass::ID = 0;
+}
+
+bool Thumb2ITBlockPass::InsertITBlocks(MachineBasicBlock &MBB) {
+ bool Modified = false;
+
+ MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
+ while (MBBI != E) {
+ MachineInstr *MI = &*MBBI;
+ ARMCC::CondCodes CC = TII->getPredicate(MI);
+ if (CC == ARMCC::AL) {
+ ++MBBI;
+ continue;
+ }
+
+ // Insert an IT instruction.
+ DebugLoc dl = MI->getDebugLoc();
+ MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
+ .addImm(CC);
+ ++MBBI;
+
+ // Finalize IT mask. If the following instruction is not predicated or it's
+ // predicated on a condition that's not the same or the opposite of CC, then
+ // the mask is 0x8.
+ ARMCC::CondCodes OCC = ARMCC::getOppositeCondition(CC);
+ unsigned Mask = 0x8;
+ while (MBBI != E || (Mask & 1)) {
+ ARMCC::CondCodes NCC = TII->getPredicate(&*MBBI);
+ if (NCC == CC) {
+ Mask >>= 1;
+ Mask |= 0x8;
+ } else if (NCC == OCC) {
+ Mask >>= 1;
+ } else {
+ break;
+ }
+ ++MBBI;
+ }
+ MIB.addImm(Mask);
+ Modified = true;
+ ++NumITs;
+ }
+
+ return Modified;
+}
+
+bool Thumb2ITBlockPass::runOnMachineFunction(MachineFunction &Fn) {
+ const TargetMachine &TM = Fn.getTarget();
+ AFI = Fn.getInfo<ARMFunctionInfo>();
+ TII = static_cast<const ARMBaseInstrInfo*>(TM.getInstrInfo());
+
+ if (!AFI->isThumbFunction())
+ return false;
+
+ bool Modified = false;
+ for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
+ ++MFI) {
+ MachineBasicBlock &MBB = *MFI;
+ Modified |= InsertITBlocks(MBB);
+ }
+
+ return Modified;
+}
+
+/// createThumb2ITBlockPass - returns and instance of the Thumb IT blocks
+/// insertion pass.
+FunctionPass *llvm::createThumb2ITBlockPass() {
+ return new Thumb2ITBlockPass();
+}
Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll?rev=75218&r1=75217&r2=75218&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll Thu Jul 9 20:54:42 2009
@@ -4,6 +4,7 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movle | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movls | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep movhi | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep it | count 6
define i32 @f1(i32 %a.s) {
entry:
Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll?rev=75218&r1=75217&r2=75218&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-select_xform.ll Thu Jul 9 20:54:42 2009
@@ -1,5 +1,6 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | count 3
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mvn | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep it | count 3
define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
%tmp1 = icmp sgt i32 %c, 10
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