[llvm-commits] [llvm] r75188 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

[Evan Cheng]

Author: evancheng
Date: Thu Jul  9 17:58:39 2009
New Revision: 75188

URL: http://llvm.org/viewvc/llvm-project?rev=75188&view=rev
Log:
Fix ldm / stm unified syntax; add t2LDM_RET.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=75188&r1=75187&r2=75188&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Thu Jul  9 17:58:39 2009
@@ -670,12 +670,12 @@
 let mayLoad = 1 in
 def t2LDM : T2XI<(outs),
                  (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
-                 "ldm${p}${addr:submode} $addr, $dst1", []>;
+                 "ldm${addr:submode}${p} $addr, $dst1", []>;
 
 let mayStore = 1 in
 def t2STM : T2XI<(outs),
                  (ins addrmode4:$addr, pred:$p, reglist:$src1, variable_ops),
-                 "stm${p}${addr:submode} $addr, $src1", []>;
+                 "stm${addr:submode}${p} $addr, $src1", []>;
 
 //===----------------------------------------------------------------------===//
 //  Move Instructions.
@@ -1052,6 +1052,16 @@
 let isReturn = 1, isTerminator = 1 in
   def t2BX_RET : T2XI<(outs), (ins), "bx lr", [(ARMretflag)]>;
 
+// FIXME: remove when we have a way to marking a MI with these properties.
+// FIXME: $dst1 should be a def. But the extra ops must be in the end of the
+// operand list.
+// FIXME: Should pc be an implicit operand like PICADD, etc?
+let isReturn = 1, isTerminator = 1, mayLoad = 1 in
+  def t2LDM_RET : T2XI<(outs),
+                    (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
+                    "ldm${addr:submode}${p} $addr, $dst1",
+                    []>;
+
 // On non-Darwin platforms R9 is callee-saved.
 let isCall = 1,
   Defs = [R0, R1, R2, R3, R12, LR,