[llvm-commits] [llvm] r75027 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Support/ lib/Target/Alpha/ lib/Target/Alpha/AsmPrinter/ lib/Target/IA64/ lib/Target/IA64/AsmPrinter/ lib/Target/MSP430/ lib/Target/Mips/AsmPrinter/ lib/Target/PIC16/ lib/Target/Sparc/AsmPrinter/ lib/Target/X86/ lib/Target/XCore/ utils/TableGen/
Torok Edwin
edwintorok at gmail.com
Wed Jul 8 12:04:44 PDT 2009
Author: edwin
Date: Wed Jul 8 14:04:27 2009
New Revision: 75027
URL: http://llvm.org/viewvc/llvm-project?rev=75027&view=rev
Log:
Convert more abort() calls to llvm_report_error().
Also remove trailing semicolon.
Modified:
llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h
llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
llvm/trunk/include/llvm/Support/ErrorHandling.h
llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp
llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp
llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp
llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp
llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
llvm/trunk/utils/TableGen/CodeEmitterGen.cpp
llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
Modified: llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h Wed Jul 8 14:04:27 2009
@@ -18,6 +18,8 @@
#define LLVM_CODEGEN_MACHINECODEEMITTER_H
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
namespace llvm {
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Wed Jul 8 14:04:27 2009
@@ -19,6 +19,8 @@
#include "llvm/Pass.h"
#include "llvm/Constant.h"
#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
namespace llvm {
class FastISel;
Modified: llvm/trunk/include/llvm/Support/ErrorHandling.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ErrorHandling.h?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ErrorHandling.h (original)
+++ llvm/trunk/include/llvm/Support/ErrorHandling.h Wed Jul 8 14:04:27 2009
@@ -49,7 +49,7 @@
void llvm_unreachable(void) NORETURN;
}
-#define LLVM_UNREACHABLE(msg) do { assert(0 && msg); llvm_unreachable(); } while(0);
+#define LLVM_UNREACHABLE(msg) do { assert(0 && msg); llvm_unreachable(); } while(0)
#endif
Modified: llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp Wed Jul 8 14:04:27 2009
@@ -26,6 +26,8 @@
#include "llvm/Function.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
namespace {
@@ -164,8 +166,7 @@
case Alpha::R30 : case Alpha::F30 : return 30;
case Alpha::R31 : case Alpha::F31 : return 31;
default:
- assert(0 && "Unhandled reg");
- abort();
+ LLVM_UNREACHABLE("Unhandled reg");
}
}
@@ -216,8 +217,7 @@
Offset = MI.getOperand(3).getImm();
break;
default:
- assert(0 && "unknown relocatable instruction");
- abort();
+ LLVM_UNREACHABLE("unknown relocatable instruction");
}
if (MO.isGlobal())
MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
@@ -234,9 +234,11 @@
} else if (MO.isMBB()) {
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
Alpha::reloc_bsr, MO.getMBB()));
- }else {
- cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
- abort();
+ } else {
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "ERROR: Unknown type of MachineOperand: " << MO;
+ llvm_report_error(Msg.str());
}
return rv;
Modified: llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Wed Jul 8 14:04:27 2009
@@ -323,7 +323,7 @@
T, CurDAG->getRegister(Alpha::F31, T),
CurDAG->getRegister(Alpha::F31, T));
} else {
- abort();
+ llvm_report_error("Unhandled FP constant type");
}
break;
}
Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Wed Jul 8 14:04:27 2009
@@ -24,6 +24,7 @@
#include "llvm/Module.h"
#include "llvm/Intrinsics.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
/// AddLiveIn - This helper function adds the specified physical register to the
@@ -312,8 +313,7 @@
SDValue());
switch (Op.getNumOperands()) {
default:
- assert(0 && "Do not know how to return this many arguments!");
- abort();
+ LLVM_UNREACHABLE("Do not know how to return this many arguments!");
case 1:
break;
//return SDValue(); // ret void is legal
Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp Wed Jul 8 14:04:27 2009
@@ -19,6 +19,7 @@
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
AlphaInstrInfo::AlphaInstrInfo()
@@ -200,7 +201,7 @@
.addReg(SrcReg, getKillRegState(isKill))
.addFrameIndex(FrameIdx).addReg(Alpha::F31);
else
- abort();
+ llvm_report_error("Unhandled register class");
}
void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
@@ -216,7 +217,7 @@
else if (RC == Alpha::GPRCRegisterClass)
Opc = Alpha::STQ;
else
- abort();
+ llvm_report_error("Unhandled register class");
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB =
BuildMI(MF, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill));
@@ -245,7 +246,7 @@
BuildMI(MBB, MI, DL, get(Alpha::LDQ), DestReg)
.addFrameIndex(FrameIdx).addReg(Alpha::F31);
else
- abort();
+ llvm_report_error("Unhandled register class");
}
void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
@@ -260,7 +261,7 @@
else if (RC == Alpha::GPRCRegisterClass)
Opc = Alpha::LDQ;
else
- abort();
+ llvm_report_error("Unhandled register class");
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB =
BuildMI(MF, DL, get(Opc), DestReg);
Modified: llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaJITInfo.cpp Wed Jul 8 14:04:27 2009
@@ -184,8 +184,7 @@
);
#else
void AlphaCompilationCallback() {
- cerr << "Cannot call AlphaCompilationCallback() on a non-Alpha arch!\n";
- abort();
+ LLVM_UNREACHABLE("Cannot call AlphaCompilationCallback() on a non-Alpha arch!");
}
#endif
}
Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp Wed Jul 8 14:04:27 2009
@@ -28,6 +28,8 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include <cstdlib>
@@ -244,8 +246,10 @@
BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
.addImm(getLower16(NumBytes)).addReg(Alpha::R30);
} else {
- cerr << "Too big a stack frame at " << NumBytes << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "Too big a stack frame at " + NumBytes;
+ llvm_report_error(Msg.str());
}
//now if we need to, save the old FP and set the new
@@ -294,8 +298,10 @@
BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
.addImm(getLower16(NumBytes)).addReg(Alpha::R30);
} else {
- cerr << "Too big a stack frame at " << NumBytes << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "Too big a stack frame at " + NumBytes;
+ llvm_report_error(Msg.str());
}
}
}
Modified: llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp Wed Jul 8 14:04:27 2009
@@ -25,6 +25,7 @@
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/Statistic.h"
@@ -100,8 +101,7 @@
return;
case MachineOperand::MO_Immediate:
- cerr << "printOp() does not handle immediate values\n";
- abort();
+ llvm_report_error("printOp() does not handle immediate values");
return;
case MachineOperand::MO_MachineBasicBlock:
@@ -188,8 +188,7 @@
// Print the assembly for the instruction.
++EmittedInsts;
if (!printInstruction(II)) {
- assert(0 && "Unhandled instruction in asm writer!");
- abort();
+ LLVM_UNREACHABLE("Unhandled instruction in asm writer!");
}
}
}
@@ -249,9 +248,7 @@
case GlobalValue::PrivateLinkage:
break;
default:
- assert(0 && "Unknown linkage type!");
- cerr << "Unknown linkage type!\n";
- abort();
+ LLVM_UNREACHABLE("Unknown linkage type!");
}
// 3: Type, Size, Align
Modified: llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp Wed Jul 8 14:04:27 2009
@@ -26,6 +26,7 @@
#include "llvm/CodeGen/DwarfWriter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Target/TargetAsmInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/Statistic.h"
@@ -317,16 +318,13 @@
case GlobalValue::PrivateLinkage:
break;
case GlobalValue::GhostLinkage:
- cerr << "GhostLinkage cannot appear in IA64AsmPrinter!\n";
- abort();
+ llvm_report_error("GhostLinkage cannot appear in IA64AsmPrinter!");
case GlobalValue::DLLImportLinkage:
- cerr << "DLLImport linkage is not supported by this target!\n";
- abort();
+ llvm_report_error("DLLImport linkage is not supported by this target!");
case GlobalValue::DLLExportLinkage:
- cerr << "DLLExport linkage is not supported by this target!\n";
- abort();
+ llvm_report_error("DLLExport linkage is not supported by this target!");
default:
- assert(0 && "Unknown linkage type!");
+ LLVM_UNREACHABLE("Unknown linkage type!");
}
EmitAlignment(Align, GVar);
Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp Wed Jul 8 14:04:27 2009
@@ -19,6 +19,7 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Constants.h"
#include "llvm/Function.h"
using namespace llvm;
@@ -579,8 +580,7 @@
switch(Op.getNumOperands()) {
default:
- assert(0 && "Do not know how to return this many arguments!");
- abort();
+ LLVM_UNREACHABLE("Do not know how to return this many arguments!");
case 1:
AR_PFSVal = DAG.getCopyFromReg(Op.getOperand(0), dl, VirtGPR, MVT::i64);
AR_PFSVal = DAG.getCopyToReg(AR_PFSVal.getValue(1), dl, IA64::AR_PFS,
Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Wed Jul 8 14:04:27 2009
@@ -32,6 +32,7 @@
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/VectorExtras.h"
using namespace llvm;
@@ -190,11 +191,14 @@
// Arguments passed in registers
MVT RegVT = VA.getLocVT();
switch (RegVT.getSimpleVT()) {
- default:
- cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
- << RegVT.getSimpleVT()
- << "\n";
- abort();
+ default:
+ {
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+ << RegVT.getSimpleVT();
+ llvm_report_error(Msg.str());
+ }
case MVT::i16:
unsigned VReg =
RegInfo.createVirtualRegister(MSP430::GR16RegisterClass);
Modified: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Wed Jul 8 14:04:27 2009
@@ -33,6 +33,7 @@
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringExtras.h"
@@ -405,7 +406,7 @@
break;
default:
- O << "<unknown operand type>"; abort (); break;
+ llvm_report_error("<unknown operand type>"); break;
}
if (closeP) O << ")";
@@ -544,16 +545,13 @@
printSizeAndType = false;
break;
case GlobalValue::GhostLinkage:
- cerr << "Should not have any unmaterialized functions!\n";
- abort();
+ llvm_report_error("Should not have any unmaterialized functions!");
case GlobalValue::DLLImportLinkage:
- cerr << "DLLImport linkage is not supported by this target!\n";
- abort();
+ llvm_report_error("DLLImport linkage is not supported by this target!");
case GlobalValue::DLLExportLinkage:
- cerr << "DLLExport linkage is not supported by this target!\n";
- abort();
+ llvm_report_error("DLLExport linkage is not supported by this target!");
default:
- assert(0 && "Unknown linkage type!");
+ LLVM_UNREACHABLE("Unknown linkage type!");
}
EmitAlignment(Align, GVar);
Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Wed Jul 8 14:04:27 2009
@@ -23,6 +23,7 @@
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
@@ -1227,8 +1228,7 @@
// return should have odd number of operands
if ((Op.getNumOperands() % 2) == 0 ) {
- assert(0 && "Do not know how to return this many arguments!");
- abort();
+ LLVM_UNREACHABLE("Do not know how to return this many arguments!");
}
// Number of values to return
Modified: llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp Wed Jul 8 14:04:27 2009
@@ -26,6 +26,7 @@
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetAsmInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/Statistic.h"
@@ -184,7 +185,7 @@
<< MO.getIndex();
break;
default:
- O << "<unknown operand type>"; abort (); break;
+ llvm_report_error("<unknown operand type>"); break;
}
if (CloseParen) O << ")";
}
@@ -298,16 +299,13 @@
case GlobalValue::InternalLinkage:
break;
case GlobalValue::GhostLinkage:
- cerr << "Should not have any unmaterialized functions!\n";
- abort();
+ llvm_report_error("Should not have any unmaterialized functions!");
case GlobalValue::DLLImportLinkage:
- cerr << "DLLImport linkage is not supported by this target!\n";
- abort();
+ llvm_report_error("DLLImport linkage is not supported by this target!");
case GlobalValue::DLLExportLinkage:
- cerr << "DLLExport linkage is not supported by this target!\n";
- abort();
+ llvm_report_error("DLLExport linkage is not supported by this target!");
default:
- assert(0 && "Unknown linkage type!");
+ LLVM_UNREACHABLE("Unknown linkage type!");
}
EmitAlignment(Align, GVar);
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Jul 8 14:04:27 2009
@@ -1186,8 +1186,7 @@
// If this is x86-64, and we disabled SSE, we can't return FP values
if ((CopyVT == MVT::f32 || CopyVT == MVT::f64) &&
((Is64Bit || TheCall->isInreg()) && !Subtarget->hasSSE1())) {
- cerr << "SSE register return with SSE disabled\n";
- exit(1);
+ llvm_report_error("SSE register return with SSE disabled");
}
// If this is a call to a function that returns an fp value on the floating
Modified: llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp Wed Jul 8 14:04:27 2009
@@ -32,6 +32,7 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
@@ -186,8 +187,7 @@
switch (GV->getLinkage()) {
case GlobalValue::AppendingLinkage:
- cerr << "AppendingLinkage is not supported by this target!\n";
- abort();
+ llvm_report_error("AppendingLinkage is not supported by this target!");
case GlobalValue::LinkOnceAnyLinkage:
case GlobalValue::LinkOnceODRLinkage:
case GlobalValue::WeakAnyLinkage:
@@ -204,14 +204,11 @@
case GlobalValue::PrivateLinkage:
break;
case GlobalValue::GhostLinkage:
- cerr << "Should not have any unmaterialized functions!\n";
- abort();
+ llvm_report_error("Should not have any unmaterialized functions!");
case GlobalValue::DLLImportLinkage:
- cerr << "DLLImport linkage is not supported by this target!\n";
- abort();
+ llvm_report_error("DLLImport linkage is not supported by this target!");
case GlobalValue::DLLExportLinkage:
- cerr << "DLLExport linkage is not supported by this target!\n";
- abort();
+ llvm_report_error("DLLExport linkage is not supported by this target!");
default:
assert(0 && "Unknown linkage type!");
}
Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Wed Jul 8 14:04:27 2009
@@ -270,9 +270,8 @@
}
const Type *Ty = cast<PointerType>(GV->getType())->getElementType();
if (!Ty->isSized() || isZeroLengthArray(Ty)) {
- cerr << "Size of thread local object " << GVar->getName()
- << " is unknown\n";
- abort();
+ llvm_report_error("Size of thread local object " + GVar->getName()
+ + " is unknown");
}
SDValue base = getGlobalAddressWrapper(GA, GV, DAG);
const TargetData *TD = TM.getTargetData();
@@ -646,10 +645,13 @@
MVT RegVT = VA.getLocVT();
switch (RegVT.getSimpleVT()) {
default:
- cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
- << RegVT.getSimpleVT()
- << "\n";
- abort();
+ {
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+ << RegVT.getSimpleVT();
+ llvm_report_error(Msg.str());
+ }
case MVT::i32:
unsigned VReg = RegInfo.createVirtualRegister(
XCore::GRRegsRegisterClass);
Modified: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp Wed Jul 8 14:04:27 2009
@@ -30,6 +30,8 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@@ -142,9 +144,11 @@
if (!isU6 && !isImmU16(Amount)) {
// FIX could emit multiple instructions in this case.
- cerr << "eliminateCallFramePseudoInstr size too big: "
- << Amount << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "eliminateCallFramePseudoInstr size too big: "
+ << Amount;
+ llvm_report_error(Msg.str());
}
MachineInstr *New;
@@ -227,8 +231,10 @@
MachineInstr *New = 0;
if (!isUs) {
if (!RS) {
- cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "eliminateFrameIndex Frame size too big: " << Offset;
+ llvm_report_error(Msg.str());
}
unsigned ScratchReg = RS->scavengeRegister(XCore::GRRegsRegisterClass, II,
SPAdj);
@@ -278,9 +284,10 @@
} else {
bool isU6 = isImmU6(Offset);
if (!isU6 && !isImmU16(Offset)) {
- // FIXME could make this work for LDWSP, LDAWSP.
- cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "eliminateFrameIndex Frame size too big: " << Offset;
+ llvm_report_error(Msg.str());
}
switch (MI.getOpcode()) {
@@ -354,8 +361,10 @@
// TODO use mkmsk if possible.
if (!isImmU16(Value)) {
// TODO use constant pool.
- cerr << "loadConstant value too big " << Value << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "loadConstant value too big " << Value;
+ llvm_report_error(Msg.str());
}
int Opcode = isImmU6(Value) ? XCore::LDC_ru6 : XCore::LDC_lru6;
BuildMI(MBB, I, dl, TII.get(Opcode), DstReg).addImm(Value);
@@ -368,8 +377,10 @@
Offset/=4;
bool isU6 = isImmU6(Offset);
if (!isU6 && !isImmU16(Offset)) {
- cerr << "storeToStack offset too big " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "storeToStack offset too big " << Offset;
+ llvm_report_error(Msg.str());
}
int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
BuildMI(MBB, I, dl, TII.get(Opcode))
@@ -384,8 +395,10 @@
Offset/=4;
bool isU6 = isImmU6(Offset);
if (!isU6 && !isImmU16(Offset)) {
- cerr << "loadFromStack offset too big " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "loadFromStack offset too big " << Offset;
+ llvm_report_error(Msg.str());
}
int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
BuildMI(MBB, I, dl, TII.get(Opcode), DstReg)
@@ -414,8 +427,10 @@
if (!isU6 && !isImmU16(FrameSize)) {
// FIXME could emit multiple instructions.
- cerr << "emitPrologue Frame size too big: " << FrameSize << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "emitPrologue Frame size too big: " << FrameSize;
+ llvm_report_error(Msg.str());
}
bool emitFrameMoves = needsFrameMoves(MF);
@@ -538,8 +553,10 @@
if (!isU6 && !isImmU16(FrameSize)) {
// FIXME could emit multiple instructions.
- cerr << "emitEpilogue Frame size too big: " << FrameSize << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "emitEpilogue Frame size too big: " << FrameSize;
+ llvm_report_error(Msg.str());
}
if (FrameSize) {
Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeEmitterGen.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeEmitterGen.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Wed Jul 8 14:04:27 2009
@@ -243,8 +243,10 @@
// Default case: unhandled opcode
o << " default:\n"
- << " cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
- << " abort();\n"
+ << " std::string msg;\n"
+ << " raw_string_ostream Msg(msg);\n"
+ << " Msg << \"Not supported instr: \" << MI;\n"
+ << " llvm_report_error(Msg.str());\n"
<< " }\n"
<< " return Value;\n"
<< "}\n\n";
Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp?rev=75027&r1=75026&r2=75027&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Wed Jul 8 14:04:27 2009
@@ -2083,20 +2083,19 @@
<< "}\n\n";
OS << "void CannotYetSelect(SDValue N) DISABLE_INLINE {\n"
- << " cerr << \"Cannot yet select: \";\n"
- << " N.getNode()->dump(CurDAG);\n"
- << " cerr << '\\n';\n"
- << " abort();\n"
+ << " std::string msg;\n"
+ << " raw_string_ostream Msg(msg);\n"
+ << " Msg << \"Cannot yet select: \";\n"
+ << " N.getNode()->print(Msg, CurDAG);\n"
+ << " llvm_report_error(Msg.str());\n"
<< "}\n\n";
OS << "void CannotYetSelectIntrinsic(SDValue N) DISABLE_INLINE {\n"
<< " cerr << \"Cannot yet select: \";\n"
<< " unsigned iid = cast<ConstantSDNode>(N.getOperand("
<< "N.getOperand(0).getValueType() == MVT::Other))->getZExtValue();\n"
- << " cerr << \"intrinsic %\"<< "
- << "Intrinsic::getName((Intrinsic::ID)iid);\n"
- << " cerr << '\\n';\n"
- << " abort();\n"
+ << " llvm_report_error(\"Cannot yet select: intrinsic %\" +\n"
+ << "Intrinsic::getName((Intrinsic::ID)iid));\n"
<< "}\n\n";
}
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