[llvm-commits] [llvm] r74964 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp test/CodeGen/X86/vec_compare.ll

[Dan Gohman]

On Jul 7, 2009, at 4:03 PM, Chris Lattner wrote:


> Author: lattner
> Date: Tue Jul  7 18:03:54 2009
> New Revision: 74964
>
> URL: http://llvm.org/viewvc/llvm-project?rev=74964&view=rev
> Log:
> add support for legalizing an icmp where the result is illegal  
> (4xi1) but
> the input is legal (4 x i32)
>
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
>    llvm/trunk/test/CodeGen/X86/vec_compare.ll
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=74964&r1=74963&r2=74964&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp  
> (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Tue  
> Jul  7 18:03:54 2009
> @@ -891,15 +891,38 @@
>
> void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo,  
> SDValue &Hi) {
>   MVT LoVT, HiVT;
> -  DebugLoc dl = N->getDebugLoc();
> +  DebugLoc DL = N->getDebugLoc();
>   GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
> -
> +
> +  // Split the input.
> +  MVT InVT = N->getOperand(0).getValueType();
>   SDValue LL, LH, RL, RH;
> -  GetSplitVector(N->getOperand(0), LL, LH);
> -  GetSplitVector(N->getOperand(1), RL, RH);
> -
> -  Lo = DAG.getNode(N->getOpcode(), dl, LoVT, LL, RL, N->getOperand 
> (2));
> -  Hi = DAG.getNode(N->getOpcode(), dl, HiVT, LH, RH, N->getOperand 
> (2));
> +  switch (getTypeAction(InVT)) {
> +  default: assert(0 && "Unexpected type action!");
> +  case WidenVector: assert(0 && "Unimp");
> +  case Legal: {
> +    assert(LoVT == HiVT && "Legal non-power-of-two vector type?");
> +    MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
> +                                 LoVT.getVectorNumElements());
> +    LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N- 
> >getOperand(0),
> +                     DAG.getIntPtrConstant(0));
> +    LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N- 
> >getOperand(0),
> +                     DAG.getIntPtrConstant 
> (InNVT.getVectorNumElements()));
> +
> +    RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N- 
> >getOperand(1),
> +                     DAG.getIntPtrConstant(0));
> +    RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N- 
> >getOperand(1),
> +                     DAG.getIntPtrConstant 
> (InNVT.getVectorNumElements()));
> +    break;
> +  }

Hi Chris,

EXTRACT_SUBVECTOR is normally used to extract a legal value from
an illegal one. The code above does the opposite, extracting a
potentially illegal value from a legal one. Right now, this code
only happens to work on x86 by coincidence: because of MMX,
types <2 x i32> and <2 x float> are legal. But if you compile
the included testcase with -disable-mmx, these types are not
legal, and CodeGen aborts.

Dan