[llvm-commits] [llvm] r74741 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

[Evan Cheng]

Author: evancheng
Date: Thu Jul  2 19:08:19 2009
New Revision: 74741

URL: http://llvm.org/viewvc/llvm-project?rev=74741&view=rev
Log:
t2LDR_PRE etc are loads.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74741&r1=74740&r2=74741&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Thu Jul  2 19:08:19 2009
@@ -546,6 +546,7 @@
             (t2LDRHpci  tconstpool:$addr)>;
 
 // Indexed loads
+let mayLoad = 1 in {
 def t2LDR_PRE  : T2Iidxldst<(outs GPR:$dst, GPR:$base_wb),
                             (ins t2addrmode_imm8:$addr),
                             AddrModeT2_i8, IndexModePre,
@@ -601,6 +602,7 @@
                             AddrModeT2_i8, IndexModePost,
                          "ldrsh", " $dst, [$base], $offset", "$base = $base_wb",
                             []>;
+}
 
 // Store
 defm t2STR   : T2I_st<"str",  BinOpFrag<(store node:$LHS, node:$RHS)>>;