[llvm-commits] [llvm] r74582 - in /llvm/trunk: lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86InstrBuilder.h test/CodeGen/X86/fast-isel-gv.ll
Chris Lattner
sabre at nondot.org
Tue Jun 30 20:27:20 PDT 2009
Author: lattner
Date: Tue Jun 30 22:27:19 2009
New Revision: 74582
URL: http://llvm.org/viewvc/llvm-project?rev=74582&view=rev
Log:
Fix some fast-isel problems selecting global variable addressing in
pic mode.
Added:
llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll
Modified:
llvm/trunk/lib/Target/X86/X86FastISel.cpp
llvm/trunk/lib/Target/X86/X86InstrBuilder.h
Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=74582&r1=74581&r2=74582&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Tue Jun 30 22:27:19 2009
@@ -457,20 +457,30 @@
AM.GV = 0;
return true;
}
- // Issue load from stub if necessary.
+
+ // Issue load from stub.
unsigned Opc = 0;
const TargetRegisterClass *RC = NULL;
+ X86AddressMode StubAM;
+ StubAM.Base.Reg = AM.Base.Reg;
+ StubAM.GV = AM.GV;
+
if (TLI.getPointerTy() == MVT::i32) {
Opc = X86::MOV32rm;
RC = X86::GR32RegisterClass;
+
+ if (Subtarget->isPICStyleGOT() &&
+ TM.getRelocationModel() == Reloc::PIC_)
+ StubAM.GVOpFlags = X86II::MO_GOT;
+
} else {
Opc = X86::MOV64rm;
RC = X86::GR64RegisterClass;
+
+ if (TM.getRelocationModel() != Reloc::Static)
+ StubAM.GVOpFlags = X86II::MO_GOTPCREL;
}
- X86AddressMode StubAM;
- StubAM.Base.Reg = AM.Base.Reg;
- StubAM.GV = AM.GV;
unsigned ResultReg = createResultReg(RC);
addFullAddress(BuildMI(MBB, DL, TII.get(Opc), ResultReg), StubAM);
Modified: llvm/trunk/lib/Target/X86/X86InstrBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrBuilder.h?rev=74582&r1=74581&r2=74582&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrBuilder.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrBuilder.h Tue Jun 30 22:27:19 2009
@@ -49,8 +49,10 @@
unsigned IndexReg;
unsigned Disp;
GlobalValue *GV;
+ unsigned GVOpFlags;
- X86AddressMode() : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0) {
+ X86AddressMode()
+ : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) {
Base.Reg = 0;
}
};
@@ -113,7 +115,7 @@
assert (0);
MIB.addImm(AM.Scale).addReg(AM.IndexReg);
if (AM.GV)
- return MIB.addGlobalAddress(AM.GV, AM.Disp);
+ return MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags);
else
return MIB.addImm(AM.Disp);
}
Added: llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll?rev=74582&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll (added)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll Tue Jun 30 22:27:19 2009
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -fast-isel | grep {_kill at GOTPCREL}
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+ at f = global i8 (...)* @kill ; <i8 (...)**> [#uses=1]
+
+declare signext i8 @kill(...)
+
+define i32 @main() nounwind ssp {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %1 = load i8 (...)** @f, align 8 ; <i8 (...)*> [#uses=1]
+ %2 = icmp ne i8 (...)* %1, @kill ; <i1> [#uses=1]
+ %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
+ store i32 %3, i32* %0, align 4
+ %4 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %4, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
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