[llvm-commits] [llvm] r74293 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/carry.ll test/CodeGen/Thumb2/thumb2-adc.ll test/CodeGen/Thumb2/thumb2-adc2.ll

Fri Jun 26 11:49:14 PDT 2009

On Jun 26, 2009, at 11:34 AM, David Goodwin wrote:

> I see, I will fix that. Seems like we need to remove the "s" from the
> shifted-register version.

Yes, please remove that 's'. Thanks.

Evan

>
>
> Index: lib/Target/ARM/ARMInstrThumb2.td
> ===================================================================
> --- lib/Target/ARM/ARMInstrThumb2.td	(revision 74293)
> +++ lib/Target/ARM/ARMInstrThumb2.td	(working copy)
> @@ -236,19 +236,19 @@
>  multiclass T2I_adde_sube_irs<string opc, PatFrag opnode, bit
> Commutable = 0> {
>     // shifted imm
>     def ri : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_imm:$rhs),
> -                 opc, "s $dst, $lhs, $rhs",
> +                 opc, " $dst, $lhs, $rhs",
>                   [(set GPR:$dst, (opnode GPR:$lhs, t2_so_imm: 
> $rhs))]>,
>                   Requires<[IsThumb, HasThumb2, CarryDefIsUnused]>;
>     // register
>     def rr : T2sI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs),
> -                 opc, "s $dst, $lhs, $rhs",
> +                 opc, " $dst, $lhs, $rhs",
>                   [(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>,
>                   Requires<[IsThumb, HasThumb2, CarryDefIsUnused]> {
>       let isCommutable = Commutable;
>     }
>     // shifted register
>     def rs : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_reg:$rhs),
> -                 opc, "s $dst, $lhs, $rhs",
> +                 opc, " $dst, $lhs, $rhs",
>                   [(set GPR:$dst, (opnode GPR:$lhs, t2_so_reg: 
> $rhs))]>,
>                   Requires<[IsThumb, HasThumb2, CarryDefIsUnused]>;
>     // Carry setting variants
>
> David
>
> On Jun 26, 2009, at 11:25 AM, Evan Cheng wrote:
>
>> Hi David,
>>
>> I intentionally split these to two sets. If the carry bit def of adde
>> is not used, it's isel'ed to the non 's' variant.
>>
>> Evan
>>
>> On Jun 26, 2009, at 11:07 AM, David Goodwin <david_goodwin at apple.com>
>> wrote:
>>
>>> Author: david_goodwin
>>> Date: Fri Jun 26 13:07:25 2009
>>> New Revision: 74293
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=74293&view=rev
>>> Log:
>>> ADC used to implement adde should use "adcs" opcode instead of  
>>> "adc".
>>>
>>> Added:
>>>  llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll
>>>  llvm/trunk/test/CodeGen/Thumb2/thumb2-adc2.ll
>>> Modified:
>>>  llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>>>  llvm/trunk/test/CodeGen/Thumb2/carry.ll
>>>
>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74293&r1=74292&r2=74293&view=diff
>>>
>>> ===
>>> ===
>>> ===
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Fri Jun 26 13:07:25
>>> 2009
>>> @@ -236,12 +236,12 @@
>>> multiclass T2I_adde_sube_irs<string opc, PatFrag opnode, bit
>>> Commutable = 0> {
>>>  // shifted imm
>>>  def ri : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_imm:$rhs),
>>> -                 opc, " $dst, $lhs, $rhs",
>>> +                 opc, "s $dst, $lhs, $rhs",
>>>                [(set GPR:$dst, (opnode GPR:$lhs, t2_so_imm:$rhs))]>,
>>>                Requires<[IsThumb, HasThumb2, CarryDefIsUnused]>;
>>>  // register
>>>  def rr : T2sI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs),
>>> -                 opc, " $dst, $lhs, $rhs",
>>> +                 opc, "s $dst, $lhs, $rhs",
>>>                [(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>,
>>>                Requires<[IsThumb, HasThumb2, CarryDefIsUnused]> {
>>>    let isCommutable = Commutable;
>>>
>>> Modified: llvm/trunk/test/CodeGen/Thumb2/carry.ll
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/carry.ll?rev=74293&r1=74292&r2=74293&view=diff
>>>
>>> ===
>>> ===
>>> ===
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/test/CodeGen/Thumb2/carry.ll (original)
>>> +++ llvm/trunk/test/CodeGen/Thumb2/carry.ll Fri Jun 26 13:07:25 2009
>>> @@ -1,6 +1,6 @@
>>> ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "subs
>>> r" | count 2
>>> -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "adc  
>>> r"
>>> -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "sbc
>>> r"  | count 2
>>> +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "adcs
>>> r"
>>> +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "sbcs
>>> r"  | count 2
>>>
>>> define i64 @f1(i64 %a, i64 %b) {
>>> entry:
>>>
>>> Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll?rev=74293&view=auto
>>>
>>> ===
>>> ===
>>> ===
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll (added)
>>> +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll Fri Jun 26 13:07:25
>>> 2009
>>> @@ -0,0 +1,32 @@
>>> +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adcs\
>>> \W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|
>>> #872428544\\|#1448498774\\|#66846720} | Count 5
>>> +
>>> +; 734439407617 = 0x000000ab00000001
>>> +define i64 @f1(i64 %a) {
>>> +    %tmp = add i64 %a, 734439407617
>>> +    ret i64 %tmp
>>> +}
>>> +
>>> +; 5066626890203137 = 0x0012001200000001
>>> +define i64 @f2(i64 %a) {
>>> +    %tmp = add i64 %a, 5066626890203137
>>> +    ret i64 %tmp
>>> +}
>>> +
>>> +; 3747052064576897025 = 0x3400340000000001
>>> +define i64 @f3(i64 %a) {
>>> +    %tmp = add i64 %a, 3747052064576897025
>>> +    ret i64 %tmp
>>> +}
>>> +
>>> +; 6221254862626095105 = 0x5656565600000001
>>> +define i64 @f4(i64 %a) {
>>> +    %tmp = add i64 %a, 6221254862626095105
>>> +    ret i64 %tmp
>>> +}
>>> +
>>> +; 287104476244869121 = 0x03fc000000000001
>>> +define i64 @f5(i64 %a) {
>>> +    %tmp = add i64 %a, 287104476244869121
>>> +    ret i64 %tmp
>>> +}
>>> +
>>>
>>> Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-adc2.ll
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-adc2.ll?rev=74293&view=auto
>>>
>>> ===
>>> ===
>>> ===
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/test/CodeGen/Thumb2/thumb2-adc2.ll (added)
>>> +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-adc2.ll Fri Jun 26
>>> 13:07:25 2009
>>> @@ -0,0 +1,6 @@
>>> +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adcs\
>>> \W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | Count 1
>>> +
>>> +define i64 @f1(i64 %a, i64 %b) {
>>> +    %tmp = add i64 %a, %b
>>> +    ret i64 %tmp
>>> +}
>>>
>>>
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