[llvm-commits] [llvm] r73622 - in /llvm/trunk: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp test/CodeGen/ARM/thumb2-add.ll test/CodeGen/ARM/thumb2-m

[Evan Cheng]

On Jun 23, 2009, at 12:12 AM, Anton Korobeynikov wrote:

> Hi, Evan
>
>>>>> +def : Pat<(and (or GPR:$src, imm16high:$imm1), imm16high0xffff:
>>>>> $imm2),
>>>>> +          (tMOVTi16 GPR:$src, (HI16 imm16high:$imm1))>,
>>>>> +         Requires<[HasThumb2]>;
>>>>
>>>> I don't get this pattern. Can you explain?
>>> Dag combiner replaces the original operation sequence (or (and reg,
>>> 0xFFFF), (shl imm, 16)) with (and (or reg, (shl imm, 16)), (or  
>>> 0xFFFF,
>>> (shl imm16, 16))). We're catching this case here. There are movt  
>>> tests
>>> there. Try to disable the pattern and see, what will happen.
>>
>> Sorry, I am being dense. What are the relationships between imm1 and
>> imm2? How come the result instruction doesn't use imm2 at all?
> Imm's are just imm parts of the op sequence I mentioned before. imm1
> is actually (shl imm, 16) and imm2 is (or 0xFFFF, (shl imm, 16)). We
> don't need both since we can recover the imm from top 16 bits either
> imm1 or imm2.

While this pattern is no doubt matching what you have in mind, it  
seems like it will match a lot more then it's intended. It can match  
imm2 that's any immediate with low 16-bits all one. It doesn't have to  
have any connection with the other immediate.

Evan

>
> -- 
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State  
> University
>
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