[llvm-commits] [llvm] r72985 - in /llvm/trunk: lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll

Eli Friedman eli.friedman at gmail.com
Fri Jun 5 21:17:04 PDT 2009


Author: efriedma
Date: Fri Jun  5 23:17:04 2009
New Revision: 72985

URL: http://llvm.org/viewvc/llvm-project?rev=72985&view=rev
Log:
Get rid of a bogus pattern that interferes with optimization.


Added:
    llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrMMX.td

Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=72985&r1=72984&r2=72985&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Fri Jun  5 23:17:04 2009
@@ -605,13 +605,6 @@
             (MMX_PUNPCKLDQrr VR64:$src, (MMX_V_SET0))>;
 }
 
-// Scalar to v4i16 / v8i8. The source may be a GR32, but only the lower
-// 8 or 16-bits matter.
-def : Pat<(bc_v8i8  (v2i32 (scalar_to_vector GR32:$src))),
-          (MMX_MOVD64rr GR32:$src)>;
-def : Pat<(bc_v4i16 (v2i32 (scalar_to_vector GR32:$src))),
-          (MMX_MOVD64rr GR32:$src)>;
-
 // Patterns to perform canonical versions of vector shuffling.
 let AddedComplexity = 10 in {
   def : Pat<(v8i8  (mmx_unpckl_undef VR64:$src, (undef))),

Added: llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll?rev=72985&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll Fri Jun  5 23:17:04 2009
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | not grep movl
+
+define <8 x i8> @a(i8 zeroext %x) nounwind {
+  %r = insertelement <8 x i8> undef, i8 %x, i32 0
+  ret <8 x i8> %r
+}
+





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