[llvm-commits] [llvm] r72706 - /llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp

[Dale Johannesen]

Author: johannes
Date: Mon Jun  1 18:13:42 2009
New Revision: 72706

URL: http://llvm.org/viewvc/llvm-project?rev=72706&view=rev
Log:
Comment grammaro/clarification.


Modified:
    llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp

Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=72706&r1=72705&r2=72706&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Mon Jun  1 18:13:42 2009
@@ -1409,10 +1409,10 @@
     // Put one value on stack.
     SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG, dl);
     
-    // ADDC and ADDE produces two results.
+    // ADDC and ADDE produce two results.
     SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
 
-    // ADDE has three operands, the last one is a flag.
+    // ADDE has three operands, the last one is the carry bit.
     if (Op.getOpcode() == ISD::ADDE)
       return DAG.getNode(Op.getOpcode(), dl, Tys, Op.getOperand(MemOp ^ 1),
                          NewVal, Op.getOperand(2));