[llvm-commits] [llvm] r72593 - in /llvm/trunk/lib/Target/ARM: ARM.td ARMInstrInfo.td ARMInstrThumb2.td ARMSubtarget.cpp ARMSubtarget.h

[Anton Korobeynikov]

Hello, Evan

> I don't think we want to distinguish thumb2 from thumb1. Thumb2 is an
> ISA extension, it should not be considered a separate ISA from thumb1.
It's not separate... As other ARM stuff Thumb2 implies thumb1...

> I would think it makes more sense to have just two modes: arm vs thumb
> mode. When in thumb mode, if thumb2 ISA is available, then that
> implies these instructions are available.
I thought about some future stuff. Consider we'll have Thumb3, Thumb4,
Thumb-A20, whatever, each one implying the previous ones.... It seems
ugly to have bunch of booleans for this...

How's about having isThumb and ThumbMode instead? The first one will
catch ARM vs Thumb and second one - the actual thumbmode...

> This is not necessary. We don't want thumb2-foo-bar. We have -
> march=arm and -march=thumb, but no -march=thumb2.
Right, but:
1. We need to distinguish v6 vs v6t2. Which differs only in presence
of thumb2 instructions. The latter should be available via
"thumbv6t2".
2. We might want to have v6t2/v7 arch but generate Thumb1 instructions only...

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University