[llvm-commits] [llvm] r72557 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll

[Evan Cheng]

Author: evancheng
Date: Thu May 28 18:52:18 2009
New Revision: 72557

URL: http://llvm.org/viewvc/llvm-project?rev=72557&view=rev
Log:
Do not try to create a MVT type of width 0.

Added:
    llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=72557&r1=72556&r2=72557&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu May 28 18:52:18 2009
@@ -4937,6 +4937,8 @@
     APInt Imm = cast<ConstantSDNode>(N1)->getAPIntValue();
     if (Opc == ISD::AND)
       Imm ^= APInt::getAllOnesValue(BitWidth);
+    if (Imm == 0 || Imm.isAllOnesValue())
+      return SDValue();
     unsigned ShAmt = Imm.countTrailingZeros();
     unsigned MSB = BitWidth - Imm.countLeadingZeros() - 1;
     unsigned NewBW = NextPowerOf2(MSB - ShAmt);

Added: llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll?rev=72557&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll Thu May 28 18:52:18 2009
@@ -0,0 +1,38 @@
+; RUN: llvm-as < %s | llc -march=x86-64
+
+	%struct.tempsym_t = type { i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32 }
+
+define fastcc signext i8 @S_next_symbol(%struct.tempsym_t* %symptr) nounwind ssp {
+entry:
+	br label %bb116
+
+bb:		; preds = %bb116
+	switch i8 undef, label %bb14 [
+		i8 9, label %bb116
+		i8 32, label %bb116
+		i8 10, label %bb116
+		i8 13, label %bb116
+		i8 12, label %bb116
+	]
+
+bb14:		; preds = %bb
+	br i1 undef, label %bb75, label %bb115
+
+bb75:		; preds = %bb14
+	%srcval16 = load i448* null, align 8		; <i448> [#uses=1]
+	%tmp = zext i32 undef to i448		; <i448> [#uses=1]
+	%tmp15 = shl i448 %tmp, 288		; <i448> [#uses=1]
+	%mask = and i448 %srcval16, -2135987035423586845985235064014169866455883682256196619149693890381755748887481053010428711403521		; <i448> [#uses=1]
+	%ins = or i448 %tmp15, %mask		; <i448> [#uses=1]
+	store i448 %ins, i448* null, align 8
+	ret i8 1
+
+bb115:		; preds = %bb14
+	ret i8 1
+
+bb116:		; preds = %bb, %bb, %bb, %bb, %bb, %entry
+	br i1 undef, label %bb, label %bb117
+
+bb117:		; preds = %bb116
+	ret i8 0
+}