[llvm-commits] [llvm] r72513 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

[Eli Friedman]

Author: efriedma
Date: Wed May 27 23:31:08 2009
New Revision: 72513

URL: http://llvm.org/viewvc/llvm-project?rev=72513&view=rev
Log:
Return the operand rather than a null SDValue when the given SELECT_CC 
is actually legal.  Part of LegalizeDAG cleanups.


Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=72513&r1=72512&r2=72513&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed May 27 23:31:08 2009
@@ -2789,12 +2789,12 @@
   // Not FP? Not a fsel.
   if (!Op.getOperand(0).getValueType().isFloatingPoint() ||
       !Op.getOperand(2).getValueType().isFloatingPoint())
-    return SDValue();
+    return Op;
 
   ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
 
   // Cannot handle SETEQ/SETNE.
-  if (CC == ISD::SETEQ || CC == ISD::SETNE) return SDValue();
+  if (CC == ISD::SETEQ || CC == ISD::SETNE) return Op;
 
   MVT ResVT = Op.getValueType();
   MVT CmpVT = Op.getOperand(0).getValueType();
@@ -2854,7 +2854,7 @@
       Cmp = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Cmp);
       return DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, FV);
   }
-  return SDValue();
+  return Op;
 }
 
 // FIXME: Split this code up when LegalizeDAGTypes lands.