[llvm-commits] [llvm] r72374 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

Eli Friedman eli.friedman at gmail.com
Sun May 24 13:32:12 PDT 2009


Author: efriedma
Date: Sun May 24 15:32:10 2009
New Revision: 72374

URL: http://llvm.org/viewvc/llvm-project?rev=72374&view=rev
Log:
Add a comment which should hopefully make the purpose of this method a 
bit clearer.


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp?rev=72374&r1=72373&r2=72374&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Sun May 24 15:32:10 2009
@@ -224,6 +224,9 @@
 }
 
 SDValue VectorLegalizer::PromoteVectorOp(SDValue Op) {
+  // Vector "promotion" is basically just bitcasting and doing the operation
+  // in a different type.  For example, x86 promotes ISD::AND on v2i32 to
+  // v1i64.
   MVT VT = Op.getValueType();
   assert(Op.getNode()->getNumValues() == 1 &&
          "Can't promote a vector with multiple results!");





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