[llvm-commits] [llvm] r72105 - in /llvm/trunk: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
Bob Wilson
bob.wilson at apple.com
Mon May 18 22:53:43 PDT 2009
Author: bwilson
Date: Tue May 19 00:53:42 2009
New Revision: 72105
URL: http://llvm.org/viewvc/llvm-project?rev=72105&view=rev
Log:
Fix pr4091: Add support for "m" constraint in ARM inline assembly.
Added:
llvm/trunk/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
Modified:
llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=72105&r1=72104&r2=72105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue May 19 00:53:42 2009
@@ -89,6 +89,13 @@
// Include the pieces autogenerated from the target description.
#include "ARMGenDAGISel.inc"
+
+private:
+ /// SelectInlineAsmMemoryOperand - Implement addressing mode selection for
+ /// inline asm expressions.
+ virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
+ char ConstraintCode,
+ std::vector<SDValue> &OutOps);
};
}
@@ -881,6 +888,21 @@
return SelectCode(Op);
}
+bool ARMDAGToDAGISel::
+SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
+ std::vector<SDValue> &OutOps) {
+ assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
+
+ SDValue Base, Offset, Opc;
+ if (!SelectAddrMode2(Op, Op, Base, Offset, Opc))
+ return true;
+
+ OutOps.push_back(Base);
+ OutOps.push_back(Offset);
+ OutOps.push_back(Opc);
+ return false;
+}
+
/// createARMISelDag - This pass converts a legalized DAG into a
/// ARM-specific DAG, ready for instruction scheduling.
///
Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=72105&r1=72104&r2=72105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Tue May 19 00:53:42 2009
@@ -124,6 +124,9 @@
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode);
+ virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
+ unsigned AsmVariant,
+ const char *ExtraCode);
void printModuleLevelGV(const GlobalVariable* GVar);
bool printInstruction(const MachineInstr *MI); // autogenerated.
@@ -769,6 +772,15 @@
return false;
}
+bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
+ unsigned OpNo, unsigned AsmVariant,
+ const char *ExtraCode) {
+ if (ExtraCode && ExtraCode[0])
+ return true; // Unknown modifier.
+ printAddrMode2Operand(MI, OpNo);
+ return false;
+}
+
void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
++EmittedInsts;
Added: llvm/trunk/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll?rev=72105&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll Tue May 19 00:53:42 2009
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc -march=arm | grep swp
+; PR4091
+
+define void @foo(i32 %i, i32* %p) nounwind {
+ %asmtmp = call i32 asm sideeffect "swp $0, $2, $3", "=&r,=*m,r,*m,~{memory}"(i32* %p, i32 %i, i32* %p) nounwind
+ ret void
+}
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