[llvm-commits] [llvm] r71924 - /llvm/trunk/lib/CodeGen/MachineVerifier.cpp

[Duncan Sands]

Author: baldrick
Date: Fri May 15 22:28:54 2009
New Revision: 71924

URL: http://llvm.org/viewvc/llvm-project?rev=71924&view=rev
Log:
Pacify gcc-4.3, which suggests explicit braces here
to avoid an ambiguous else.

Modified:
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=71924&r1=71923&r2=71924&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Fri May 15 22:28:54 2009
@@ -345,7 +345,7 @@
           addRegWithSubRegs(regsKilled, Reg);
       }
       // Explicit use of a dead register.
-      if (!MO->isImplicit() && !regsLive.count(Reg))
+      if (!MO->isImplicit() && !regsLive.count(Reg)) {
         if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
           // Reserved registers may be used even when 'dead'.
           if (!isReserved(Reg))
@@ -360,6 +360,7 @@
           else if (MI->getOpcode() != TargetInstrInfo::PHI)
             MInfo.vregsLiveIn.insert(std::make_pair(Reg, MI));
         }
+      }
     } else {
       // Register defined.
       // TODO: verify that earlyclobber ops are not used.