[llvm-commits] [llvm] r71602 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb.td

[Jim Grosbach]

Author: grosbach
Date: Tue May 12 17:30:18 2009
New Revision: 71602

URL: http://llvm.org/viewvc/llvm-project?rev=71602&view=rev
Log:
correct register class for tADDspi to GPR since the register will always be SP

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=71602&r1=71601&r2=71602&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Tue May 12 17:30:18 2009
@@ -307,7 +307,7 @@
 def tADDrSPi : TI<(outs tGPR:$dst), (ins GPR:$sp, i32imm:$rhs),
                   "add $dst, $sp, $rhs * 4 @ addrspi", []>;
 
-def tADDspi : TIt<(outs tGPR:$dst), (ins tGPR:$lhs, i32imm:$rhs),
+def tADDspi : TIt<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs),
                   "add $dst, $rhs * 4", []>;
 
 def tAND : TIt<(outs tGPR:$dst), (ins tGPR:$lhs, tGPR:$rhs),