[llvm-commits] [PATCH] Machine code verifier pass

[Jakob Stoklund Olesen]

On 12/05/2009, at 03.07, Evan Cheng wrote:

> How about x86? :-)

Here is one from CodeGen/X86/2007-03-01-SpillerCrash.ll:

  0x1839d5c, LLVM BB @0x1001e00, ID#3:
Live Ins: %XMM1 %XMM2
     Predecessors according to CFG: 0x1839b88 (#2)
	%XMM3<def> = FsFLD0SS
	UCOMISSrr %XMM1<kill>, %XMM3<kill>, %EFLAGS<imp-def>
	JBE mbb<,0x1839dfc>, %EFLAGS<imp-use,kill>
     Successors according to CFG: 0x1839dac (#4) 0x1839dfc (#5)

: 0x1839dac, LLVM BB @0x1001e30, ID#4:
Live Ins: %XMM1 %XMM2
     Predecessors according to CFG: 0x1839d5c (#3)
	%XMM2<def> = MOVHLPSrr %XMM2, %XMM2
	%XMM2<def> = PSHUFDri %XMM1, 1
	%XMM1<def> = MOVHLPSrr %XMM1, %XMM1
	%XMM2<def,dead> = FsXORPSrm %XMM2, %reg0, 1, %reg0, <cp#3>, %reg0,  
Mem:LD(4,16) [ConstantPool + 0]
	JMP mbb<foo.exit,0x1839e4c>
     Successors according to CFG: 0x1839e4c (#6)

*** Bad machine code: Live-in register not live-out from predecessor ***
- function:    test
- basic block: ID#4
Register XMM1 is not live-out from MBB ID#3.

There are also physreg double defs in ID#4, but that check is disabled  
for now.


 From CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll:

bb4: 0xf73718, LLVM BB @0x1006e50, ID#11:
     Predecessors according to CFG: 0x183a7a8 (#10) 0x183a848 (#13)
	%RAX<def> = MOV64rm %RAX<kill>, 1, %reg0, 96, %reg0, Mem:LD(8,8)  
[tmp9 + 0]
	%RDI<def> = MOV64rr %R14<kill>
	%RSI<def> = MOV64rr %RBX<kill>

** Bad machine code: Using an undefined physical register ***
- function:    ubyte_divmod
- basic block: ID#11
- instruction: %RAX<def> = MOV64rm %RAX<kill>, 1, %reg0, 96, %reg0,  
Mem:LD(8,8) [tmp9 + 0]
- operand 1:   %RAX<kill>

*** Bad machine code: Using an undefined physical register ***
- function:    ubyte_divmod
- basic block: ID#11
- instruction: %RDI<def> = MOV64rr %R14<kill>
- operand 1:   %R14<kill>

*** Bad machine code: Using an undefined physical register ***
- function:    ubyte_divmod
- basic block: ID#11
- instruction: %RSI<def> = MOV64rr %RBX<kill>
- operand 1:   %RBX<kill>