[llvm-commits] [llvm] r71235 - /llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td

[Anton Korobeynikov]

Author: asl
Date: Fri May  8 13:50:26 2009
New Revision: 71235

URL: http://llvm.org/viewvc/llvm-project?rev=71235&view=rev
Log:
Add 8 bit select

Modified:
    llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td

Modified: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td?rev=71235&r1=71234&r2=71235&view=diff

==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td Fri May  8 13:50:26 2009
@@ -107,6 +107,10 @@
 }
 
 let usesCustomDAGSchedInserter = 1 in {
+  def Select8  : Pseudo<(outs GR8:$dst), (ins GR8:$src1, GR8:$src2, i8imm:$cc),
+                        "# Select8 PSEUDO",
+                        [(set GR8:$dst,
+                          (MSP430selectcc GR8:$src1, GR8:$src2, imm:$cc))]>;
   def Select16 : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2, i8imm:$cc),
                         "# Select16 PSEUDO",
                         [(set GR16:$dst,