[llvm-commits] [llvm] r70821 - in /llvm/trunk/lib/CodeGen: VirtRegMap.cpp VirtRegMap.h
Evan Cheng
evan.cheng at apple.com
Sun May 3 20:30:13 PDT 2009
Author: evancheng
Date: Sun May 3 22:30:11 2009
New Revision: 70821
URL: http://llvm.org/viewvc/llvm-project?rev=70821&view=rev
Log:
Make sure to color with only allocatable registers for the specific register class.
Modified:
llvm/trunk/lib/CodeGen/VirtRegMap.cpp
llvm/trunk/lib/CodeGen/VirtRegMap.h
Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=70821&r1=70820&r2=70821&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Sun May 3 22:30:11 2009
@@ -26,6 +26,7 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
@@ -51,6 +52,7 @@
bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) {
TII = mf.getTarget().getInstrInfo();
+ TRI = mf.getTarget().getRegisterInfo();
MF = &mf;
ReMatId = MAX_STACK_SLOT+1;
@@ -73,6 +75,13 @@
SpillSlotToUsesMap.resize(8);
ImplicitDefed.resize(MF->getRegInfo().getLastVirtReg()+1-
TargetRegisterInfo::FirstVirtualRegister);
+
+ allocatableRCRegs.clear();
+ for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(),
+ E = TRI->regclass_end(); I != E; ++I)
+ allocatableRCRegs.insert(std::make_pair(*I,
+ TRI->getAllocatableSet(mf, *I)));
+
grow();
return false;
Modified: llvm/trunk/lib/CodeGen/VirtRegMap.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.h?rev=70821&r1=70820&r2=70821&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegMap.h (original)
+++ llvm/trunk/lib/CodeGen/VirtRegMap.h Sun May 3 22:30:11 2009
@@ -32,6 +32,7 @@
class MachineInstr;
class MachineFunction;
class TargetInstrInfo;
+ class TargetRegisterInfo;
class VirtRegMap : public MachineFunctionPass {
public:
@@ -47,8 +48,11 @@
private:
const TargetInstrInfo *TII;
-
+ const TargetRegisterInfo *TRI;
MachineFunction *MF;
+
+ DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs;
+
/// Virt2PhysMap - This is a virtual to physical register
/// mapping. Each virtual register is required to have an entry in
/// it; even spilled virtual registers (the register mapped to a
@@ -466,7 +470,7 @@
unsigned getFirstUnusedRegister(const TargetRegisterClass *RC) {
int Reg = UnusedRegs.find_first();
while (Reg != -1) {
- if (RC->contains(Reg))
+ if (allocatableRCRegs[RC][Reg])
return (unsigned)Reg;
Reg = UnusedRegs.find_next(Reg);
}
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